Digital like short circuit to ground protection for DC-DC converter
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摘要
An adaptive method to protect a DC to DC buck converter from destruction in the event of a short circuit to ground at the output is described. The short circuit protection method is small and inexpensive, and uses very low current, allowing the buck converter to remain active and protected, as it self regulates below an acceptable maximum peak current. Inductor current is sensed in the current-mode loop circuitry and an over-current comparator is used. A masking interval generator is required to mask false over-current triggers caused by converter switching-induced glitches. Simple logic is used to detect if the current-limit comparator indicates over-current at the end of the masking interval and to implement over-current pulse-skipping on genuine over-current detection.
說明書
This application is related to U.S. patent application Ser. No. 14/468,588, filed on Aug. 26, 2014, which is assigned to a common assignee, and is herein incorporated by reference in its entirety.
The present disclosure relates generally to DC-DC converters and more specifically to current loop mode control, and the detection of and protection against short circuit conditions at the converter output.
In power conversion solutions, using, for example, DC to DC buck converters, over-current detection and limiting schemes exist of varying utility and effectiveness.
權(quán)利要求
What is claimed is:1. A switching converter having short circuit protection, comprising:a) an over-current comparator configured to detect an inductor current exceeding a current limit; b) a masking delay generator configured to mask information provided by said over-current comparator for a time period; c) short circuit detection logic configured to detect if said over-current comparator indicates an over-current condition after said time period, and configured to exit said over-current condition such that said switching converter self regulates below an acceptable maximum peak current, in a hysteretic mode, with a pattern of N up to N+2 skipped pulses, using a counter, where N is a number dependent on a short circuit event; d) a pulse skipper for skipping one or more of said skipped pulses during said over-current condition, wherein exiting said over-current condition is configured when a switching frequency is less than a peak limit for more than a predefined amount of clock cycles; and e) a regulation loop comprising a flip-flop, configured to provide a magnetization signal to a first switch, and a demagnetization signal to a second switch; wherein said switching converter is configured to exit said short-circuit event and remain enabled at all times. 2. The switching converter having short circuit protection of claim 1 , wherein said over-current comparator is configured to be a current or a voltage comparator. 3. The switching converter having short circuit protection of claim 1 , wherein said masking delay generator is configured to mask false over-current triggers caused by switching-induced glitches and to detect genuine over-current events at an end of said time period. 4. The switching converter having short circuit protection of claim 1 , wherein outputs of said over-current comparator and said masking delay generator are configured to detect said short circuit event in said switching converter. 5. The switching converter having short circuit protection of claim 1 , wherein outputs of said over-current comparator and said masking delay generator are configured to regulate switching frequency such that when the output of said over-current comparator is high and the output of said masking delay generator is low, the switching frequency is decreased and a pulse is skipped and the counter is incremented by 1, in said pulse skipper. 6. The switching converter having short circuit protection of claim 1 , wherein outputs of said over-current comparator and said masking delay generator are configured to regulate switching frequency such that when the output of said over-current comparator is low and the output of said masking delay generator is low, the switching frequency is increased and the counter is decremented by 1, in said pulse skipper. 7. The switching converter having short circuit protection of claim 1 , wherein said short circuit detection logic is configured to control magnetization and regulate said inductor current below an acceptable maximum peak current. 8. The switching converter having short circuit protection of claim 1 , wherein said short circuit detection logic is configured to transition from demagnetization to magnetization, by closing a said first switch and opening a said second switch, and configured to transition from magnetization to demagnetization, by opening said first switch and closing said second switch. 9. The switching converter having short circuit protection of claim 1 , wherein circuits are configured to implement effective short circuit and over current protection, requiring no additional protection circuits in a case of current mode loop regulation. 10. A method of short circuit protection, comprising steps of:a) comparing an inductor current to a current limit; b) masking an output of an over-current comparator for a time period; c) detecting a short circuit, by short circuit detection logic, if said output of said over-current comparator indicates an over-current condition after said time period, and exiting said over-current condition such that said switching converter self regulates below an acceptable maximum peak current; d) skipping one or more pulses during said over-current condition, in a hysteretic mode, with a pattern of N up to N+2 skipped pulses, using a counter, where N is a number dependent on a short circuit event, wherein exiting said over-current condition is configured when a switching frequency is less than a peak limit for more than a predefined amount of clock cycles; and e) providing a magnetization signal to a first switch, and a demagnetization signal to a second switch; and maintaining a steady state for a switching converter, providing a smooth recovery during said short-circuit event. 11. The method of short circuit protection of claim 10 , wherein said over-current comparator comprises a current or a voltage comparator. 12. The method of short circuit protection of claim 10 , wherein said short circuit detection logic detects said short circuit event when the output of said over-current comparator is greater than a peak limit of said over-current comparator. 13. The method of short circuit protection of claim 10 , wherein said short circuit detection logic stops magnetization in a switching converter when said short circuit event is detected. 14. The method of short circuit protection of claim 10 , wherein said short circuit detection logic transitions from demagnetization to magnetization in a switching converter when exiting said short circuit event. 15. The method of short circuit protection of claim 10 , wherein a frequency of a switching converter is regulated by skipping one or more pulses, incrementing the counter, when said short circuit event is detected. 16. The method of short circuit protection of claim 10 , wherein a frequency of a switching converter is regulated by decrementing the counter for skipping pulses, when exiting said short circuit event. 17. The method of short circuit protection of claim 10 , wherein a current mode control loop uses an existing current sensing circuit to implement over current protection.
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