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Digital like short circuit to ground protection for DC-DC converter

專利號(hào)
US11177734B2
公開日期
2021-11-16
申請(qǐng)人
Dialog Semiconductor (UK) Limited(GB London)
發(fā)明人
Nicolas Borfigat; Guillaume deCremoux
IPC分類
H02M1/32; H02M3/156
技術(shù)領(lǐng)域
clk_pwm,buck,il,vout,vea,inductor,mag,clk,converter,current
地域: Reading

摘要

An adaptive method to protect a DC to DC buck converter from destruction in the event of a short circuit to ground at the output is described. The short circuit protection method is small and inexpensive, and uses very low current, allowing the buck converter to remain active and protected, as it self regulates below an acceptable maximum peak current. Inductor current is sensed in the current-mode loop circuitry and an over-current comparator is used. A masking interval generator is required to mask false over-current triggers caused by converter switching-induced glitches. Simple logic is used to detect if the current-limit comparator indicates over-current at the end of the masking interval and to implement over-current pulse-skipping on genuine over-current detection.

說明書

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It is a further object of one or more embodiments of the disclosure to implement a smooth loop recovery on removal of a short, and to prevent the converter from being put back into maximum frequency mode if it ramps to a high over-current again, providing a natural soft-restart from overcurrent due to a short. Other objects will appear hereinafter.

The above and other objects of the present disclosure may be accomplished in the following manner. Inductor current is sensed in the current-mode loop circuitry and an over-current comparator is used. A masking interval generator is required to mask false over-current triggers caused by converter switching-induced glitches. Simple logic is used to detect if the current-limit comparator indicates over-current at the end of the masking interval and to implement over-current pulse-skipping on genuine over-current detection. This method reuses existing analog circuits to gain over-current protection. Only a small amount of additional digital logic is required to handle over-current pulse skipping and recovery.

BRIEF DESCRIPTION OF THE DRAWINGS

The present disclosure will be more clearly understood from the following description taken in conjunction with the accompanying drawings in which like reference numerals designate similar or corresponding elements, regions and portions and in which:

FIG. 1 is a circuit schematic of a typical buck converter with current mode regulation loop.

FIG. 2 is a timing diagram of a short circuit event description and the effect on VEA, IL, and VOUT of the buck converter.

權(quán)利要求

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