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Method and apparatus for compensating power amplifier performance

專利號
US11177784B2
公開日期
2021-11-16
申請人
KMW INC.(KR Hwaseong-si)
發(fā)明人
BaeMook Jeong; HyeRyeon Kim
IPC分類
H03G3/20; H03F3/21; H03F3/195; H03F3/24
技術(shù)領(lǐng)域
amplifier,power,signal,in,input,disclosure,bias,unit,source,apparatus
地域: Hwaseong-si

摘要

The present disclosure in some embodiments relates to a method of calibrating a power amplifier performance and an apparatus therefor, which provide an optimal calibration of the output characteristics of a power amplifier to all possible combinations in the input signal source by enabling individualized calibrations for changes in the output characteristics at room temperature and changing temperatures, thereby improving the performance of the power amplifier.

說明書

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

In this regard, the collection unit 110 collects the combination information on how the carrier frequencies of the input signal are combined (hereinafter, referred to as combination information of the input signal), and it transmits the collected combination information to the control unit 120 as reference data for calibrating the performance of the power amplifier 140.

The collection unit 110 according to some embodiments can collect the combination information of the input signal through various methods. For example, the collection unit 110 may collect the combination information of the input signal through a manner of receiving pre-identified signal source information from the upper side of the system. In another embodiment, the collection unit 110 may include a separate circuit for determining the combination information of the input signal, and may directly calculate the combination information by using the separate circuit provided.

Referring now further to FIGS. 2A and 2B, a method performed by the collection unit 110 for collecting the combination information of the input signal will be illustrated. FIGS. 2A and 2B illustrate a case where the collection unit 110 includes a separate circuit for collecting the combination information of the input signal.

FIG. 2A illustrates a circuit diagram of a circuit for detecting the combination information of the input signal in a digital stage, and FIG. 2B illustrates a circuit diagram of a circuit for detecting the combination information of the input signal in an analog stage.

權(quán)利要求

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