Alternatively a current source may replace the load resistor R6 in FIG. 20, 21, and or 22. For example if the current source is Iref=10 uA (10 micro-amps) and Vref=0.100 volt is the voltage at the (+) input terminal of amplifier U1B, then the drain to source resistance via the bias servo circuit in FIG. 20, 21, and or 22 will provide a gate to source voltage such that the reference FET drain to source resistance, Rds=(Vref/Iref). Preferably, the two FETs shown in FIG. 20, 21, and or 22 are matched. The reference FET in FIG. 20 is Q1B, the reference FET in FIG. 21 is Q2A, and the reference FET in FIG. 22 is Q1B. The drain to source resistances of the associated FETs in FIG. 20, 21, and or 22 will be substantially equal to the drain to source resistances of the reference FET. For example the associated FET in FIG. 20 is Q1A, the associated FET in FIG. 21 is Q2B, and the associated FET in FIG. 22 is Q1A. For FIG. 20, 21, and or 22, if a modulated drain to source resistance is required, the current source, Iref may include a time varying function that includes a DC current and an AC current in the form of Iref(t)=(I0+Imod(t)), where (I0+Imod(t))≥0, where I0 is a DC current and Imod (t) is a time varying current or an AC current. Alternatively to provide a modulated drain to source resistance, set a fixed voltage to R6, the modify the Vref that is coupled to VR2 which may be replaced with a voltage source that includes a varying function such as Vref→Vref(t)=(V0+Vmod(t)) where (V0+Vmod(t))≥0, and where V0=DC voltage, and where Vmod(t)=an AC voltage or a time varying voltage. The Vref coupled to R6 may be a constant voltage or R6 may be replaced with a DC current source.
