The delay of a gate is a function of its threshold voltage. Non-critical paths may be selected and the threshold voltage of the gates in these paths may be increased when a multiple threshold transistor is used. The result is balanced propagation delay along different paths that converge at the receiving gate. Performance is maintained because it is determined by the time specified by the critical path. A higher threshold voltage may also reduce the leakage current of a path. While the techniques described above may manage glitches, it is desirable to reduce or eliminate glitches to ensure better power management and low power design.

Aspects of the present disclosure use a logic element. This logic element may be C-element or C-gate, or hysteresis flip-flop. The C-element is a semiconductor distributive circuit, whose operation in time is described by a Hasse diagram C-elements may be realized as a sum-of-product (SOP) circuit. An alternative implementation uses a Schmitt trigger.

A Schmitt trigger is a comparator circuit with hysteresis implemented by applying positive feedback to the non-inverting input of a comparator or differential amplifier. It is an active circuit that converts an analog signal to a digital output signal. The “trigger” operates because the output retains its value until the input changes sufficiently to trigger a change. In the non-inverting configuration, when the input is higher than a chosen threshold, the output is high. When the input is below a lower chosen threshold, the output is low, and when the input is between the two levels, the output retains its value. This dual threshold action is known as hysteresis and implies that the Schmidt trigger possesses a memory and can act as a bistable multivibrator (e.g., latch or flip-flop).