FIG. 10B is a timing diagram showing the effect of toggling the logic element in the GABUF assembly 1000 on both input signals and the resulting output signal, according to aspects of the present disclosure. The signal waveforms in FIG. 10B depict the overlap of signals that allows the delayed signal δBUF to propagate through the logic cone 500. The total delay from a to z is δBUF plus a C-element propagation delay td*. The relationship between input signals a and ad may take several forms. For example, if an amount of signal overlap is greater than an amount δglitch, then the ad signal is time shifted by an amount δBUF, as is the corresponding output signal z. If δglitch is greater than the input signal, then there is no overlap in signals and based on the truth table in FIG. 8B, there is no output change. This will occur regardless of the amount of overlap. If there is a small overlap, or the signal is equal to δglitch then the signal output will switch, based on the truth table of FIG. 8B. The amount of the time shift is the amount of small overlap. The output will be delayed by δBUF plus the logic element or C-element propagation delay time.
The operation of the GABUF 1000 may be described as an enhanced buffer design that also filters glitches. The filtered pulse width is set by the internal buffer delay. The amount of overlap between input signals a and ad determines if the pulse is propagated. If the pulse is wider or equal to δBUF, there is overlap and output signal z toggles. If the pulse is smaller than δBUF, there is no overlap and output signal z does not toggle.
