白丝美女被狂躁免费视频网站,500av导航大全精品,yw.193.cnc爆乳尤物未满,97se亚洲综合色区,аⅴ天堂中文在线网官网

Reducing glitch power in digital circuits

專利號(hào)
US11177805B1
公開日期
2021-11-16
申請(qǐng)人
QUALCOMM Incorporated(US CA San Diego)
發(fā)明人
Harshat Pant; Ravindraraj Ramaraju; Luis Filipe Brochado Reis; Tuck Boon Chan; Mayank Sen Sharma
IPC分類
H03K5/00; H03K19/003
技術(shù)領(lǐng)域
glitch,glitches,logic,signal,delay,in,input,absorbing,disclosure,may
地域: CA CA San Diego

摘要

A glitch absorbing buffer reduces glitch power in digital circuits. The glitch absorbing buffer includes a logic element configured to identify a digital logic glitch and a delay circuit configured to selectively delay one input to a logic element. The amount of delay imposed is equivalent to a pulse width of the glitch. A Schmitt trigger may amplify the low pass behavior on the input.

說明書

FIG. 13 is a flow chart of the operation of a glitch absorbing buffer (GABUF), according to aspects of the present disclosure. FIG. 13 depicts a simplified flowchart 1300 of a method for absorbing glitches using a glitch absorbing buffer. At block 1302, a determination is made if two inputs arrive separately at a logic element, such as logic elements 302-308 of FIG. 3. In one aspect, the GABUF receives an input signal and internally creates a delayed version of the input signal. The delayed version is then compared with the original signal using a logic element. Thus, in block 1304, a determination of an amount of delay between the arrival of the two inputs is made. In block 1306, a glitch is defined as the amount of delay between the arrival of the two inputs. This delay is defined as δBUF, as shown in FIG. 7. Then, in block 1308, it is determined if there is an overlap between the two input signals, as shown in FIG. 10B. If the two input signals overlap, in block 1310, a logic element is toggled. As shown in FIG. 8A, a logic element, such as the C-element 800, thus delays an earlier arriving signal, shifting the signal, and absorbing the glitch.

權(quán)利要求

1
微信群二維碼
意見反饋