According to one aspect of the present disclosure, a glitch absorbing buffer is described. The glitch absorbing buffer includes means for determining if two inputs arrive separately at a logic element. Additional aspects provide means for determining an amount of the delay between the arrival of the two inputs at a logic element. Once the amount of delay has been determined a means for determining if there is an overlap and determines any overlap between the two input signals. If there is an overlap between the two input signals, a further means for toggling a C-element toggles the C-element.

FIG. 14 is a block diagram showing exemplary electronic devices in which a configuration of the disclosure may be advantageously employed a according to aspects of the present disclosure. For purposes of illustration, FIG. 14 shows three remote units 1420, 1430, and 1450 and two base stations 1440. It will be recognized that wireless communications systems may have many more remote units and base stations. Remote units 1420, 1430, and 1450 include IC devices 1425A, 1425B, and 1425C that include the disclosed GABUF. It will be recognized that other devices may also include the disclosed GABUF, such as the base stations, switching devices, and network equipment. FIG. 14 shows forward link signals 1480 from the base station 1440 to the remote units 1420, 1430, and 1450 and reverse link signals 1490 from the remote units 1420, 1430, and 1450 to base station 1440.