As noted above, the PCB substrate 110 may include the plurality of conductive layers 140 that provide both electrical and thermal conduction through the PCB substrate 110. Accordingly, the PCB substrate 110 may include a logic layer 208 disposed between the first surface of the PCB substrate 110 and a first power layer 210. A first core layer 212 is disposed between the first power layer 210 and a second core layer 214. A second power layer 216 is disposed between the second core layer 214 and a lower layer 218. In some embodiments, a copper substrate S-cell 226 is positioned at the one or more power devices 204. Each of the plurality of conductive layers 140 of the PCB substrate 110 may be a conductive material (both electrical and thermal) such as copper. In other embodiments, the conductive material may be aluminum, silver, nickel, gold, any combination thereof, or the like. Further, the plurality of conductive layers 140 of the PCB substrate 110 may be etched to form various conductive pathways laminated onto and/or between sheets/layers of non-conductive substrates (e.g., dielectric polymer layers) to form an integral and such that the PCB substrate 110 is uniformly thick. PCB substrates according to the present disclosure include a plurality of layers laminated together around the one or more power devices 204 such that the one or more power devices 204 are completely encased within the PCB substrate 110 (such as illustrated in FIG. 2). The plurality of conductive layers 140, as noted above, provide both electrical conduction to and from the one or more power devices 204 and thermal conductive between the one or more power devices 204 and the one or more cooling assemblies 200.