Determination of application delay value of minimum scheduling offset limit
摘要
說(shuō)明書
The first wireless device 100 includes at least one processor 102 and at least one memory 104 and may further include at least one transceiver 106 and/or at least one antenna 108. The processor 102 may be configured to control the memory 104 and/or the transceiver 106 and to implement the descriptions, functions, procedures, proposals, methods, and/or operational flowcharts disclosed herein. For example, the processor 102 may process information in the memory 104 to generate first information/signal and may then transmit a radio signal including the first information/signal through the transceiver 106. In addition, the processor 102 may receive a radio signal including second information/signal through the transceiver 106 and may store information obtained from signal processing of the second information/signal in the memory 104. The memory 104 may be connected to the processor 102 and may store various pieces of information related to the operation of the processor 102. For example, the memory 104 may store a software code including instructions to perform some or all of processes controlled by the processor 102 or to perform the descriptions, functions, procedures, proposals, methods, and/or operational flowcharts disclosed herein. Here, the processor 102 and the memory 104 may be part of a communication modem/circuit/chip designed to implement a radio communication technology (e.g., LTE or NR). The transceiver 106 may be connected with the processor 102 and may transmit and/or receive a radio signal via the at least one antennas 108. The transceiver 106 may include a transmitter and/or a receiver. The transceiver 106 may be replaced with a radio frequency (RF) unit. In this specification, the wireless device may refer to a communication modem/circuit/chip.
