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Circuit board structure and manufacturing method thereof

專利號
US11516910B1
公開日期
2022-11-29
申請人
Unimicron Technology Corp.(TW Taoyuan)
發(fā)明人
Chia-Yu Peng; John Hon-Shing Lau; Kai-Ming Yang; Pu-Ju Lin; Cheng-Ta Ko; Tzyy-Jang Tseng
IPC分類
H01R12/52; H05K1/02; H05K1/11; H05K3/24; H05K3/06; H05K3/40
技術(shù)領(lǐng)域
layer,pads,structure,dielectric,circuit,build,seed,pillars,solder,substrate
地域: Taoyuan

摘要

A circuit board structure includes a redistribution structure layer, a build-up circuit structure layer, and a connection structure layer. The redistribution structure layer has a first and second surface, and includes an inner and outer dielectric layer, first connecting pads, and chip pads. A bottom surface of each first connecting pad is aligned with the first surface, and the chip pads are protruded from and located on the second surface. The build-up circuit structure layer includes second connecting pads. The connection structure layer is disposed between the redistribution structure layer and the build-up circuit structure layer and includes a substrate and conductive paste pillars penetrating the substrate. The first connecting pads are electrically connected to the second connecting pads via the conductive paste pillars, respectively. A top surface of each conductive paste pillar is aligned with the first surface of the redistribution structure layer.

說明書

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BACKGROUND OF THE INVENTION Field of the Invention

The invention relates to a substrate structure and a manufacturing method thereof, and particularly relates to a circuit board structure and a manufacturing method thereof.

Description of Related Art

In general, two circuit boards with circuits or conductive structures are connected to each other via solder joints, and underfill is used to fill the gap between the two substrates to seal the solder joints. However, in the process of high-temperature reflow of the solder, a circuit board with a larger area size may not be released due to stress, and larger warpage is likely to occur, thereby reducing the assembly yield between the two circuit boards.

SUMMARY OF THE INVENTION

The invention provides a circuit board structure without using solder and underfill, thus reducing the cost and achieving better structural reliability.

The invention further provides a manufacturing method of a circuit board structure for manufacturing the above circuit board structure.

權(quán)利要求

1
What is claimed is:1. A circuit board structure, comprising:a redistribution structure layer having a first surface and a second surface opposite to each other and comprising an inner dielectric layer, an outer dielectric layer, a plurality of first connecting pads, and a plurality of chip pads, wherein the inner dielectric layer has the first surface, a bottom surface of each of the first connecting pads is aligned with the first surface, the outer dielectric layer has the second surface, and the chip pads are protruded from the second surface and located on the second surface;a build-up circuit structure layer disposed at a side of the redistribution structure layer and comprising a plurality of second connecting pads, wherein a linewidth and a line spacing of the redistribution structure layer are smaller than a linewidth and a line spacing of the build-up circuit structure layer; anda connection structure layer disposed between the redistribution structure layer and the build-up circuit structure layer and comprising a substrate and a plurality of conductive paste pillars penetrating the substrate, wherein the first connecting pads are electrically connected to the second connecting pads via the conductive paste pillars, respectively, a top surface of each of the conductive paste pillars is aligned with the first surface of the redistribution structure layer, and the second connecting pads are respectively embedded in the substrate.2. The circuit board structure of claim 1, wherein the redistribution structure layer further comprises at least one dielectric layer, at least one redistribution circuit, and a plurality of conductive vias, the at least one dielectric layer is located between the inner dielectric layer and the outer dielectric layer, the at least one redistribution circuit and the at least one dielectric layer are alternately disposed, and the first connecting pads, the at least one redistribution circuit, and the chip pads are electrically connected via the conductive vias.3. The circuit board structure of claim 2, wherein materials of the inner dielectric layer, the outer dielectric layer, and the at least one dielectric layer comprise a photosensitive dielectric material or an Ajinomoto deposition film, respectively.4. The circuit board structure of claim 1, further comprising:a surface treatment layer disposed on the chip pads of the redistribution structure layer, wherein a material of the surface treatment layer comprises an electroless nickel electroless palladium immersion gold, an organic solder resist, or an electroless nickel immersion gold.5. The circuit board structure of claim 1, further comprising:a solder mask disposed on a surface of the build-up circuit structure layer relatively far away from the connection structure layer and covering a portion of the build-up circuit structure layer to define a plurality of solder ball pads.6. A manufacturing method of a circuit board structure, comprising:providing a redistribution structure layer, wherein the redistribution structure layer has a first surface and a second surface opposite to each other and comprises an inner dielectric layer, an outer dielectric layer, a plurality of first connecting pads, and a plurality of chip pads, the inner dielectric layer has the first surface, a bottom surface of each of the first connecting pads is aligned with the first surface, the outer dielectric layer has the second surface, and the chip pads are protruded from the second surface and located on the second surface;providing a connection structure layer comprising a substrate and a plurality of conductive paste pillars penetrating the substrate, wherein the connection structure layer is in a B-stage state;providing a build-up circuit structure layer comprising a plurality of second connecting pads, wherein a linewidth and a line spacing of the redistribution structure layer are smaller than a linewidth and a line spacing of the build-up circuit structure layer; andlaminating the redistribution structure layer, the connection structure layer, and the build-up circuit structure layer so that the connection structure layer is located between the redistribution structure layer and the build-up circuit structure layer, wherein the first connecting pads are respectively electrically connected to the second connecting pads via the conductive paste pillars, a top surface of each of the conductive paste pillars is aligned with the first surface of the redistribution structure layer, the second connecting pads are respectively embedded in the substrate, and the connection structure layer is transformed from the B-stage state to a C-stage state.7. The manufacturing method of the circuit board structure of claim 6, wherein the step of providing the redistribution structure layer comprises:providing a temporary substrate, a release film, and a first seed layer, wherein the release film is located between the temporary substrate and the first seed layer;forming a first patterned photoresist layer on the first seed layer, wherein the first patterned photoresist layer exposes a portion of the first seed layer;electroplating a first metal layer on the first seed layer exposed by the first patterned photoresist layer using the first patterned photoresist layer as an electroplating mask;removing the first patterned photoresist layer and the first seed layer thereunder to expose a portion of the release film and form the first connecting pads;forming the inner dielectric layer on the first connecting pads and the exposed release film;forming at least one redistribution circuit, at least one dielectric layer, a plurality of first conductive vias, and a plurality of second conductive vias, wherein the at least one redistribution circuit is disposed on the inner dielectric layer, and the at least one redistribution circuit and the at least one dielectric layer are alternately disposed, the first conductive vias pass through the inner dielectric layer and are electrically connected to the at least one redistribution circuit and the first connecting pads, and the second conductive vias pass through the at least one dielectric layer and are electrically connected to the at least one redistribution circuit;forming the outer dielectric layer on the at least one redistribution circuit, wherein the outer dielectric layer has a plurality of openings, and the openings expose a portion of the at least one redistribution circuit;forming a second seed layer on the outer dielectric layer and on an inner wall of the openings;forming a second patterned photoresist layer on the second seed layer, wherein the second patterned photoresist layer exposes a portion of the second seed layer;electroplating a second metal layer on the second seed layer exposed by the second patterned photoresist layer using the second patterned photoresist layer as an electroplating mask; andremoving the second patterned photoresist layer to expose the second seed layer and form the chip pads.8. The manufacturing method of the circuit board structure of claim 7, further comprising, before laminating the redistribution structure layer, the connection structure layer, and the build-up circuit structure layer:laminating an adhesion layer and a composite substrate on the redistribution structure layer, wherein the adhesion layer is located between the composite substrate and the chip pads of the redistribution structure layer, and the composite substrate comprises a core substrate and a first copper foil layer and a second copper foil layer located on two opposite surfaces of the core substrate, and the second copper foil layer is located between the composite substrate and the adhesion layer; andremoving the temporary substrate and the release film after laminating the adhesion layer and the composite substrate on the redistribution structure layer to expose the bottom surface of each of the first connecting pads and the first surface of the inner dielectric layer.9. The manufacturing method of the circuit board structure of claim 8, further comprising, after laminating the redistribution structure layer, the connection structure layer, and the build-up circuit structure layer:forming a protective layer on a surface of the build-up circuit structure layer relatively far away from the connection structure layer;performing a de-boarding process to remove the first copper foil layer and the core substrate of the composite substrate;performing a first etching process to remove the second copper foil layer to expose the adhesion layer;performing a peeling process to remove the protective layer to expose the surface of the build-up circuit structure layer relatively far away from the connection structure layer;performing a plasma etching process to remove the adhesion layer to expose the chip pads;performing a second etching process to remove the second seed layer to expose the second surface of the outer dielectric layer; andforming a surface treatment layer on the chip pads of the redistribution structure layer, wherein a material of the surface treatment layer comprises an electroless nickel electroless palladium immersion gold, an organic solder resist, or an electroless nickel immersion gold.10. The manufacturing method of the circuit board structure of claim 6, further comprising, before laminating the redistribution structure layer, the connection structure layer, and the build-up circuit structure layer:forming a solder mask on a surface of the build-up circuit structure layer relatively far away from the connection structure layer, wherein the solder mask covers a portion of the build-up circuit structure layer to define a plurality of solder ball pads.
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