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Semiconductor apparatus and equipment

專利號
US11528445B2
公開日期
2022-12-13
申請人
CANON KABUSHIKI KAISHA（JP Tokyo）
發(fā)明人
Katsuhito Sakurai; Yoshiaki Takada; Takahiro Shirai; Hideo Kobayashi; Kohichi Nakamura; Daisuke Yoshida; Fumihiro Inui
IPC分類
H04N5/369; H04N5/3745; H01L27/146; H01L25/16; H04N5/378; H04N5/374; H04N5/347
技術(shù)領(lǐng)域
th,pixel,circuits,electric,row,circuit,column,signal,signals,scanning
地域： Tokyo

摘要

A semiconductor apparatus includes a stack of first and second chips each having a plurality of pixel circuits arranged in a matrix form. The pixel circuit of the a-th row and the e1-th column is connected to the electric circuit of the p-th row and the v-th column. The pixel circuit of the a-th row and the f1-th column is connected to the electric circuit of the q-th row and the v-th column. The pixel circuit of the a-th row and the g1-th column is connected to the electric circuit of the r-th row and the v-th column. The pixel circuit of the a-th row and the h1-th column is connected to the electric circuit of the s-th row and the v-th column.

說明書

FIGS. 2A and 2B are schematic diagrams illustrating an embodiment of a semiconductor apparatus.

FIGS. 3A and 3B are schematic diagrams illustrating an embodiment of a semiconductor apparatus.

FIGS. 4A and 4B are schematic diagrams illustrating an embodiment of a semiconductor apparatus.

FIGS. 5A and 5B are schematic diagrams illustrating an embodiment of a semiconductor apparatus.

FIGS. 6A and 6B are schematic diagrams illustrating an embodiment of a semiconductor apparatus.

FIG. 7 is a schematic diagram illustrating an embodiment of a semiconductor apparatus.

FIG. 8 is a schematic diagram illustrating an embodiment of a semiconductor apparatus.

FIG. 9 is a schematic diagram illustrating an embodiment of a semiconductor apparatus.

FIGS. 10A and 10B are a schematic diagram illustrating an embodiment of a semiconductor apparatus.

FIGS. 11A and 11B are a schematic diagram illustrating an embodiment of a semiconductor apparatus.

FIGS. 12A and 12B are schematic diagrams illustrating an embodiment of a semiconductor apparatus.

權(quán)利要求

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