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Semiconductor apparatus and equipment

專利號
US11528445B2
公開日期
2022-12-13
申請人
CANON KABUSHIKI KAISHA(JP Tokyo)
發(fā)明人
Katsuhito Sakurai; Yoshiaki Takada; Takahiro Shirai; Hideo Kobayashi; Kohichi Nakamura; Daisuke Yoshida; Fumihiro Inui
IPC分類
H04N5/369; H04N5/3745; H01L27/146; H01L25/16; H04N5/378; H04N5/374; H04N5/347
技術(shù)領(lǐng)域
th,pixel,circuits,electric,row,circuit,column,signal,signals,scanning
地域: Tokyo

摘要

A semiconductor apparatus includes a stack of first and second chips each having a plurality of pixel circuits arranged in a matrix form. The pixel circuit of the a-th row and the e1-th column is connected to the electric circuit of the p-th row and the v-th column. The pixel circuit of the a-th row and the f1-th column is connected to the electric circuit of the q-th row and the v-th column. The pixel circuit of the a-th row and the g1-th column is connected to the electric circuit of the r-th row and the v-th column. The pixel circuit of the a-th row and the h1-th column is connected to the electric circuit of the s-th row and the v-th column.

說明書

Thirteenth Embodiment

With reference to FIG. 17, a thirteenth embodiment will be described. Like numbers refer to like parts throughout, and any repetitive description will be omitted. The thirteenth embodiment may be combined with the first to twelfth embodiments and particularly be combined with the eleventh embodiment or the twelfth embodiment. FIG. 17 illustrates a layout of the chip 2. In a direction that rows of the electric circuit 20 are aligned, a plurality of electric circuits 20 are provided between a plurality of scanning circuits 461 and 462. In the direction that columns of the electric circuits 20 align, a scanning circuit 463 is provided between a plurality of columns of the electric circuits 20 and an outside edge of the chip 2. In this example, a readout circuit 441 is placed between the scanning circuit 461 and the outside edge of the chip 2. However, the scanning circuit 461 may be placed between the readout circuit 441 and the outside edge of the chip 2. Having described that the readout circuit 442 is placed between the scanning circuit 462 and the outside edge of the chip 2, the scanning circuit 462 may be placed between the readout circuit 442 and the outside edge of the chip 2.

權(quán)利要求

1
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