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Backplane footprint for high speed, high density electrical connectors

專利號(hào)
US11553589B2
公開日期
2023-01-10
申請(qǐng)人
Amphenol Corporation（US CT Wallingford）
發(fā)明人
Marc Robert Charbonneau; Jose Ricardo Paniagua
IPC分類
H05K1/02; H05K1/03; H05K1/09; H05K1/11; H05K1/18; H05K3/04; H05K3/30; H05K3/32; H05K3/40; H05K3/42; H05K3/46; H01R12/51; H01R12/70; H01R12/73; H01R12/71
技術(shù)領(lǐng)域
vias,antipad,shadow,backplane,conductive,connector,signal,in,ground,layers
地域： CT CT Wallingford

摘要

A printed circuit board includes a plurality of layers including attachment layers and routing layers; and columns of via patterns formed in the plurality of layers, wherein via patterns in adjacent columns are offset in a direction of the columns, each of the via patterns comprising: first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; and at least one conductive shadow via located between the first and second signal vias of the differential pair. In some embodiments, at least one conductive shadow via is electrically connected to a conductive surface film.

說明書

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a divisional of U.S. patent application Ser. No. 16/666,536, filed Oct. 29, 2019, which is a divisional of U.S. patent application Ser. No. 16/214,298, filed Dec. 10, 2018, now U.S. Pat. No. 10,485,097, which is a divisional of U.S. patent application Ser. No. 15/452,096, filed Mar. 7, 2017, now U.S. Pat. No. 10,187,972, which claims priority based on Provisional Application No. 62/305,049, filed Mar. 8, 2016, each of which is hereby incorporated by reference in its entirety.

BACKGROUND

This patent application relates generally to interconnection systems, such as those including electrical connectors, used to interconnect electronic assemblies.

Electrical connectors are used in many electronic systems. It is generally easier and more cost effective to manufacture a system as separate electronic assemblies, such as printed circuit boards (“PCBs”), which may be joined together with electrical connectors. A known arrangement for joining several printed circuit boards is to have one printed circuit board serve as a backplane. Other printed circuit boards, called “daughter boards” or “daughter cards,” may be connected through the backplane.

權(quán)利要求

1
What is claimed is:1. A printed circuit board comprising:a plurality of layers, a top layer of the plurality of layers including a conductive surface film; andvia patterns formed in the plurality of layers, each of the via patterns comprising:at least one signal via connected to a layer of the plurality of layers, wherein the at least one signal via comprises first and second signal vias that form a differential signal pair; andat least one conductive shadow via electrically connected to the conductive surface film, wherein the at least one conductive shadow via includes two shadow vias located midway between the first and second signal vias and wherein the two shadow vias contact the conductive surface film on opposite sides of the first and second signal vias, thereby effectively electrically short circuiting opposite sides of the conductive surface film between the first and second signal vias.2. The printed circuit board as defined in claim 1, wherein the at least one shadow via extends through the plurality of layers.3. The printed circuit board as defined in claim 1, further comprising additional shadow vias located between adjacent via patterns and electrically connected to the conductive surface film.4. The printed circuit board as defined in claim 1, wherein the conductive surface film is configured to contact a conductive element of a connector.5. The printed circuit board as defined in claim 1, wherein each of the via patterns further comprises an antipad formed in the conductive surface film and surrounding the first and second signal vias.6. The printed circuit board as defined in claim 1, wherein each of the via patterns further comprises a first antipad surrounding the first signal via and a second antipad surrounding the second signal via.
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