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Backplane footprint for high speed, high density electrical connectors

專(zhuān)利號(hào)
US11553589B2
公開(kāi)日期
2023-01-10
申請(qǐng)人
Amphenol Corporation(US CT Wallingford)
發(fā)明人
Marc Robert Charbonneau; Jose Ricardo Paniagua
IPC分類(lèi)
H05K1/02; H05K1/03; H05K1/09; H05K1/11; H05K1/18; H05K3/04; H05K3/30; H05K3/32; H05K3/40; H05K3/42; H05K3/46; H01R12/51; H01R12/70; H01R12/73; H01R12/71
技術(shù)領(lǐng)域
vias,antipad,shadow,backplane,conductive,connector,signal,in,ground,layers
地域: CT CT Wallingford

摘要

A printed circuit board includes a plurality of layers including attachment layers and routing layers; and columns of via patterns formed in the plurality of layers, wherein via patterns in adjacent columns are offset in a direction of the columns, each of the via patterns comprising: first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; and at least one conductive shadow via located between the first and second signal vias of the differential pair. In some embodiments, at least one conductive shadow via is electrically connected to a conductive surface film.

說(shuō)明書(shū)

FIG. 8 is an enlarged top view of a via pattern in a signal breakout layer, in accordance with embodiments.

DETAILED DESCRIPTION

The inventors have recognized and appreciated that, although substantial focus has been placed on providing improved electrical connectors in order to improve the performance of interconnection systems, at some very high frequencies significant performance improvement may be achieved by inventive designs for printed circuit boards. In accordance with some embodiments, improvements may be achieved by the incorporation of structures to alter the electrical properties of the printed circuit board in a connector footprint. The structures shown and described herein may be utilized in any type of printed circuit board, including but not limited to backplanes, mother boards, daughter boards, orthogonally mating daughter cards that mate with or without a midplane and daughter cards that mate to a cable.

Those structures, for example, may include conducting structures, known as vias, extending vertically through a printed circuit board. In some embodiments, the structures may be shadow vias which are plated or filled with conductive material through some or all of the layers of the printed circuit board. The shadow vias are not required to accept contact tails of the connector and are configured and positioned relative to signal vias to improve performance, particularly at high frequencies. In some embodiments, the shadow vias reduce crosstalk between signal vias in adjacent columns of signal vias in a connector footprint. In some embodiments, the shadow vias are located between signal vias of a differential signal pair.

權(quán)利要求

1
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