In some embodiments, the at least one shadow via extends through the plurality of layers.

In some embodiments, the at least one shadow via is plated or filled with a conductive material.

In some embodiments, the printed circuit board further comprises additional shadow vias located between adjacent via patterns in each of the columns.

In some embodiments, each of the via patterns further comprises ground vias extending through at least the attachment layers, the ground vias including ground conductors.

In some embodiments, the first and second signal vias and the ground vias are configured to accept compliant pins of a connector.

In some embodiments, each of the via patterns further comprises an antipad surrounding the first and second signal vias.

In some embodiments, each of the via patterns further comprises a first antipad surrounding the first signal via and a second antipad surrounding the second signal via.

In some embodiments, first and second signal traces are connected to the first and second signal vias, respectively, in a breakout layer of the routing layers and wherein the first and second antipads in a layer below the breakout layer include ground plane projections toward the first and second signal vias underneath the first and second signal traces.

In some embodiments, the at least one shadow via comprises a slot-shaped shadow via.