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Radio frequency (RF) system with RF isolation chambers and method of manufacture

專利號(hào)
US11612051B1
公開日期
2023-03-21
申請人
LOCKHEED MARTIN CORPORATION(US MD Bethesda)
發(fā)明人
Andrew E. White; James J. LaFrance; Thomas J. Clark; Richard K. Andrews
IPC分類
H05K1/02; H05K3/42; H01L23/66
技術(shù)領(lǐng)域
fence,pwb,circuit,may,rf,wall,walls,via,vias,or
地域: MD MD Bethesda

摘要

A system includes a printed circuit board (PCB). The PCB includes a radio frequency (RF) circuit that includes a plurality of circuit modules and signal trace lines. Each circuit module is electrically connected to at least one other circuit module by a signal trace line. The system includes a via fence comprising fence walls having at least two materials laminated using a printed wire board (PWB) process. The fence walls include a plurality of vias. The fence walls form a plurality of free-form RF isolation chambers, each chamber includes chamber walls that surround each circuit module outside of the PCB. The embodiments also include a method of manufacturing and/or isolating the system or components of the system.

說明書

BACKGROUND

Embodiments relate to a radio frequency (RF) system with RF isolation chambers and method of manufacture.

Radio frequency circuit components operating in a high-frequency environment are prone to noise signals that can deteriorate the performance of the circuit. Various techniques have been attempted to reduce the noise signals or separate frequencies in a printed wire board (PWB). Radio frequency circuit components are designed to meet certain specifications to meet or exceed temperature tolerances and vibrational forces. Radio frequency circuit components are designed to meet certain frequency bands and/or frequency separations, such as when the device integrates multiple frequencies of operation.

The disclosure provides techniques that are an improvement over known techniques to address noise signals or frequency separation.

SUMMARY

Embodiments relate to a radio frequency (RF) system with free-form RF isolation chambers and method of manufacture.

An aspect of the disclosure includes a system that includes a printed circuit board (PCB) having a radio frequency (RF) circuit. The circuit includes a plurality of circuit modules and signal trace lines, each circuit module being electrically connected to at least one other circuit module by a signal trace line. The system includes a via fence comprising fence walls having at least two materials laminated using a printed wire board (PWB) process and a plurality of vias formed in the walls. The fence walls form a plurality of free-form RF isolation chambers and each chamber includes chamber walls that surround each circuit module outside of the PCB.

權(quán)利要求

1
We claim:1. A system, comprising:a printed circuit board (PCB) comprising a radio frequency (RF) circuit, the circuit comprises a plurality of circuit modules and signal trace lines, each circuit module being electrically connected to at least one other circuit module by a signal trace line; anda via fence comprising fence walls having at least two materials laminated using a printed wire board (PWB) process and a plurality of vias formed therein, the fence walls form a plurality of free-form RF isolation chambers, each chamber includes chamber walls that surround each circuit module outside of the PCB wherein:the at least two materials comprise a first material and a second material;the PCB comprises a ground layer; andthe fence walls comprise:an inner wall made of the first material; andan encapsulating layer surrounding the inner wall, made of the second material different from the first material and electrically connected to the ground layer.2. The system of claim 1, wherein the RF circuit comprises an RF receiver, an RF transmitter or an RF transceiver.3. The system of claim 1, wherein the fence walls comprise:a top surface; anda bottom surface affixed to the PCB; andfurther comprising:a cover affixed to the top surface such that one or more of the chambers form a closed cavity.4. The system of claim 3, wherein each closed cavity is configured to reduce waveguide cavity resonance.5. The system of claim 1, wherein:the fence walls comprise a bottom surface that is configured to be affixed to the ground layer;the bottom surface includes non-conductive sections at locations where the encapsulating layer is absent; andthe signal trace line that electrically connects two adjacent circuit modules passes through the non-conductive section.6. The system of claim 5, further comprising solder or epoxy configured to affix the encapsulating layer to the ground layer.7. The system of claim 6, wherein:the ground layer comprises a plurality of cutouts forming holes in the ground layer;each cutout is configured to receive therethrough a corresponding circuit module that resides above a plane of the ground layer; andthe fence walls are configured to surround the holes of the plurality of cutouts.8. The system of claim 1, wherein:the plurality of circuit modules has a circuit pattern having spacing distances between adjacent circuit modules; andwherein the fence walls have a coefficient of thermal expansion (CTE) that matches the PCB.9. A method, comprising:forming a printed circuit board (PCB) comprising a radio frequency (RF) circuit, the circuit comprises a plurality of circuit modules and signal trace lines, each circuit module being electrically connected to at least one other circuit module by a signal trace line;forming a via fence comprising fence walls having at least two materials laminated using a printed wire board (PWB) process and a plurality of vias formed therein, the fence walls form a plurality of free-form chambers, each chamber includes chamber walls that surround each circuit module outside of the PCB;fabricating the PCB with a ground layer;fabricating the fence walls with a first material and a second material, wherein the fence walls comprise:an inner wall made of the first material, andan encapsulating layer surrounding the inner wall, made of the second material different from the first material; andelectrically connecting the encapsulating layer to the ground layer.10. The method of claim 9, wherein the RF circuit comprises an RF receiver, an RF transmitter or an RF transceiver.11. The method of claim 9, wherein forming the via fence comprises:forming a top surface; andforming a bottom surface to affix to the PCB; andthe method further comprising:forming a cover configured to be affixed to the top surface such that one or more of the chambers form a closed cavity.12. The method of claim 11, further comprising:designing each closed cavity to reduce a waveguide cavity resonance.13. The method of claim 9, wherein:electrically connecting the encapsulating layer to the ground layer comprises affixing a bottom surface of the fence wall to the ground layer, the bottom surface includes non-conductive sections at locations where the encapsulating layer is absent; andthe method further comprising:passing through the non-conductive sections the signal trace line that electrically connects two adjacent circuit modules.14. The method of claim 13, further comprising:soldering or epoxying the encapsulating layer to the ground layer.15. The method of claim 14, further comprising:forming in the ground layer a plurality of cutouts forming holes in the ground layer;receiving in each cutout a corresponding circuit module that resides above a plane of the ground layer; andaffixing the fence walls to the ground layer so that the fence walls surround the holes of the plurality of cutouts.16. The method of claim 9, wherein:the plurality of circuit modules having a circuit pattern having spacing distances between adjacent circuit modules; andthe method further comprising:determining whether each spacing distance between adjacent circuit modules is equal to or greater than a predetermined minimum width of the fence walls; andin response to determining that at least one spacing distance is less than the predetermined minimum width, adjusting the circuit pattern.17. The method of claim 9, the method further comprising:forming via holes in the fence walls; andwherein the fence walls have a coefficient of thermal expansion (CTE) that matches the PCB.18. The method of claim 9, wherein forming the via fence comprises forming free-form RF isolation chambers.
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