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Electronic device

專利號
US11617265B1
公開日期
2023-03-28
申請人
RENESAS ELECTRONICS CORPORATION(JP Tokyo)
發(fā)明人
Kazuaki Tsuchiyama; Tatsuaki Tsukuda
IPC分類
H05K1/11; H05K1/14; H01L23/538; H01L25/065
技術(shù)領(lǐng)域
fpc1,terminal,wiring,44s1,signal,pcb1,substrate,in,terminals,44g1
地域: Tokyo

摘要

A width of each of a first signal terminal and a reference potential terminal formed in a first connection region of a core insulating layer constituting a flexible substrate is larger than a width of each of a first backside signal terminal and a backside reference potential terminal formed in a second connection region of the core insulating layer. In addition, a first separation distance between the first signal terminal and the reference potential terminal arranged adjacent to the first signal terminal is smaller than a second separation distance between the first backside signal terminal and the backside reference potential terminal arranged adjacent to the first backside signal terminal. An insulating film formed on a first surface of the core insulating layer at a position overlapping each of the first connection region and the second connection region covers the first connection region such that the second connection region is exposed.

說明書

BACKGROUND

The present invention relates to an electronic device.

There is an electronic device that transmits an electrical signal between a flexible substrate and a PCB (Printed Circuit Board) substrate electrically connected to each other. For example, Japanese Unexamined Patent Application No. 2019-212837 and Japanese Unexamined Patent Application No. 2020-43251 each disclose an optical transceiver that transmits an electrical signal between a flexible substrate and a PCB substrate.

SUMMARY

In a case where signal transmission is performed, signal transmission efficiency can be improved by matching a characteristic impedance of a signal transmission path to a design value. In a case where signal transmission is performed between the flexible substrate and the PCB substrate, since a wiring structure of the signal transmission path in a periphery of a connection portion between substrates differs from other portions, deviation between the characteristic impedance of the portion and the design value tends to become large.

On the other hand, in a case where an electrical test of an electronic device having a structure that connects the flexible substrate and the PCB substrate is conducted, it is preferable that the device comprises a structure that allows easy connection between a flexible substrate-side terminal and a PCB substrate-side terminal in a removable manner.

From the viewpoint of improving performance of the electronic device, it is desirable for the device to comprise, for example, a structure in which a degree of deviation in the characteristic impedance for the connection portion between the flexible substrate and the PCB substrate is reduced, and in which the electrical test can be easily performed.

權(quán)利要求

1
What is claimed is:1. An electronic device comprising:a first wiring substrate having a flexibility; anda second wiring substrate more rigid than the first wiring substrate and electrically connected to the first wiring substrate,wherein the first wiring substrate includes:a core insulating layer having a first surface and a second surface opposite the first surface, the first surface having a first connection region facing the second wiring substrate, and the second surface having a second connection region overlapping the first connection region;a plurality of first wirings formed on the first surface and extending in a first direction;a second wiring formed on the second surface and extending in the first direction;a plurality of first terminals formed in the first connection region and electrically connected to the plurality of first wirings or the second wiring;a plurality of second terminals formed in the second connection region and electrically connected to the plurality of first wirings or the second wiring; andan insulating film formed on the first surface of the core insulating layer at a position overlapping each of the first connection region and the second connection region,wherein the plurality of first wirings includes:a first signal wiring to which an electrical signal is transmitted; anda reference potential wiring arranged adjacent to the first signal wiring and to which a reference potential is supplied,wherein a reference potential is supplied to the second wiring,wherein the plurality of first terminals includes:a first signal terminal electrically connected to the first signal wiring; anda reference potential terminal arranged adjacent to the first signal terminal and electrically connected to each of the reference potential wiring and the second wiring,wherein the plurality of second terminals includes:a first backside signal terminal electrically connected to the first signal terminal; anda backside reference potential terminal arranged adjacent to the first backside signal terminal and electrically connected to the reference potential terminal,wherein the second wiring overlaps the first signal wiring,wherein a width of the first signal terminal is larger than a width of the first backside signal terminal, and a width of the reference potential terminal is larger than a width of the backside reference potential terminal,wherein a first separation distance between the first signal terminal and the reference potential terminal is smaller than a second separation distance between the first backside signal terminal and the backside reference potential terminal,wherein the insulating film covers the first connection region such that the second connection region is exposed,wherein the insulating film covering the first connection region covers a peripheral portion of each of the first terminals such that a joint portion of each of the first terminals is exposed,wherein, in a first opening formed in the insulating film, the first signal terminal is electrically connected to the second wiring substrate via a first conductive joint material, andwherein, in a second opening formed in the insulating film, the reference potential terminal is electrically connected to the second wiring substrate via a second conductive joint material electrically separated from the first conductive joint material.2. The electronic device according to claim 1, further comprising:a first semiconductor device mounted on the first wiring substrate; anda second semiconductor device mounted on the second wiring substrate,wherein the first signal terminal and the first signal wiring are included in a transmission path electrically connecting the first semiconductor device and the second semiconductor device to each other.3. The electronic device according to claim 1,wherein the width of the first signal terminal is larger than a width of the first signal wiring.4. The electronic device according to claim 1,wherein the plurality of first terminals includes a second signal terminal arranged adjacent to the first signal terminal, and in which a signal current that differs from that of the first signal terminal flows,wherein the plurality of first wirings includes a second signal wiring connected to the second signal terminal and arranged adjacent to the first signal wiring,wherein the second wiring overlaps the second signal wiring,wherein the plurality of second terminals includes a second backside signal terminal electrically connected to the second signal terminal,wherein, in plan view, a width of the second signal terminal is larger than a width of the second backside signal terminal,wherein a third separation distance between the first signal terminal and the second signal terminal is smaller than a fourth separation distance between the first backside signal terminal and the second backside signal terminal, andwherein, in a third opening formed in the insulating film, the second signal terminal is electrically connected to the second wiring substrate via a third conductive joint material electrically separated from the first conductive joint material and the second conductive joint material.5. The electronic device according to claim 1,wherein the second wiring substrate includes:an insulating layer having a third surface and a fourth surface opposite the third surface;a third wiring formed on the third surface and extending in the first direction;a ground plane formed on the fourth surface and to which a reference potential is supplied;a third connection region arranged on a portion of the third surface and facing the first wiring substrate; anda plurality of third terminals formed in the third connection region and electrically connected to the third wiring or the ground plane,wherein the plurality of third terminals includes:a second substrate signal terminal connected to the first signal terminal; anda second substrate reference potential terminal connected to the reference potential terminal, andwherein each of the third terminals overlaps the ground plane.6. The electronic device according to claim 5,wherein the width of the first signal terminal is smaller than a width of the third wiring connected to the first signal terminal.7. The electronic device according to claim 1,wherein the first wiring substrate further includes:a first protective film formed on the first surface; anda second protective film formed on the second surface,wherein, among the plurality of first wirings, a portion other than the first connection region is covered by the first protective film, andwherein, among the second wiring, a portion other than the second connection region is covered by the second protective film.8. An electronic device comprising:a first wiring substrate having a flexibility; anda second wiring substrate more rigid than the first wiring substrate and electrically connected to the first wiring substrate,wherein the first wiring substrate includes:a core insulating layer having a first surface and a second surface opposite the first surface, the first surface having a first connection region facing the second wiring substrate, and the second surface having a second connection region overlapping the first connection region;a plurality of first wirings formed on the first surface and extending in a first direction;a second wiring formed on the second surface and extending in the first direction;a plurality of first terminals formed in the first connection region and electrically connected to the plurality of first wirings or the second wiring;a plurality of second terminals formed in the second connection region and electrically connected to the plurality of first wirings or the second wiring; andan insulating film formed on the first surface of the core insulating layer at a position overlapping each of the first connection region and the second connection region,wherein the plurality of first wirings includes:a first signal wiring to which an electrical signal is transmitted; anda second signal wiring arranged adjacent to the first signal terminal and in which an electrical signal that differs from the electrical signal flowing in the first signal terminal flows,wherein a reference potential is supplied to the second wiring,wherein the plurality of first terminals includes:a first signal terminal electrically connected to the first signal wiring; anda second signal terminal arranged adjacent to the first signal terminal and electrically connected to the second signal wiring,wherein the plurality of second terminals includes:a first backside signal terminal electrically connected to the first signal terminal; anda second backside signal terminal arranged adjacent to the first backside signal terminal and electrically connected to the second signal terminal,wherein the second wiring overlaps each of the first signal wiring and the second signal wiring,wherein a width of the first signal terminal is larger than a width of the first backside signal terminal, and a width of the second signal terminal is larger than a width of the second backside signal terminal,wherein a first separation distance between the first signal terminal and the second signal terminal is smaller than a second separation distance between the first backside signal terminal and the second backside signal terminal,wherein the insulating film covers the first connection region such that the second connection region is exposed,wherein the insulating film covering the first connection region is formed in the first connection region such that a peripheral portion of each of the first terminals is covered and such that a joint portion of each of the first terminals is exposed,wherein, in a first opening formed in the insulating film, the first signal terminal is electrically connected to the second wiring substrate via a first conductive joint material, andwherein, in a second opening formed in the insulating film, the second signal terminal is electrically connected to the second wiring substrate via a second conductive joint material electrically separated from the first conductive joint material.9. The electronic device according to claim 8, further comprising:a first semiconductor device mounted on the first wiring substrate; anda second semiconductor device mounted on the second wiring substrate,wherein the first signal terminal and the first signal wiring are included in a transmission path electrically connecting the first semiconductor device and the second semiconductor device to each other.10. The electronic device according to claim 8,wherein the width of the first signal terminal is larger than a width of the first signal wiring.11. The electronic device according to claim 8,wherein the first wiring substrate further includes:a first protective film formed on the first surface; anda second protective film formed on the second surface,wherein, among the plurality of first wirings, a portion other than the first connection region is covered by the first protective film, andwherein, among the second wiring, a portion other than the second connection region is covered by the second protective film.
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