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Electronic device

專利號
US11617265B1
公開日期
2023-03-28
申請人
RENESAS ELECTRONICS CORPORATION(JP Tokyo)
發(fā)明人
Kazuaki Tsuchiyama; Tatsuaki Tsukuda
IPC分類
H05K1/11; H05K1/14; H01L23/538; H01L25/065
技術(shù)領(lǐng)域
fpc1,terminal,wiring,44s1,signal,pcb1,substrate,in,terminals,44g1
地域: Tokyo

摘要

A width of each of a first signal terminal and a reference potential terminal formed in a first connection region of a core insulating layer constituting a flexible substrate is larger than a width of each of a first backside signal terminal and a backside reference potential terminal formed in a second connection region of the core insulating layer. In addition, a first separation distance between the first signal terminal and the reference potential terminal arranged adjacent to the first signal terminal is smaller than a second separation distance between the first backside signal terminal and the backside reference potential terminal arranged adjacent to the first backside signal terminal. An insulating film formed on a first surface of the core insulating layer at a position overlapping each of the first connection region and the second connection region covers the first connection region such that the second connection region is exposed.

說明書

As can be seen by comparing FIGS. 3 and 4, the wiring 43 shown in FIG. 3 overlaps the signal wiring 42s2. FIG. 5 is an enlarged cross-sectional view taken along an extension direction of the signal terminal 45s1 shown in FIG. 3. However, the cross section taken along the extension direction of the signal terminal 45s2 shown in FIG. 3 also has a structure similar to that of FIG. 5. Therefore, the signal terminals 44s1 and 45s1 shown in FIG. 5 can be replaced with the signal terminals 44s2 and 45s2. In addition, the signal wiring 42s1 shown in FIG. 5 can be replaced with the signal wiring 42s2. As shown in FIG. 6, the plurality of terminals 45 include the signal terminal 45s2 electrically connected to the signal terminal 44s2. The width 44s2W of the signal terminal 44s2 shown in FIG. 4 is larger than the width 45s2W of the signal terminal 45s2 shown in FIG. 3. As shown in FIG. 6, a separation distance 44GP2 between the signal terminal 44s1 and the signal terminal 44s2 is smaller than the separation distance 45GP2 between the signal terminal 45s1 and the signal terminal 45s2. In an opening OP3 (see FIG. 4) formed in the solder resist film SR1, the signal terminal 44s2 is electrically connected to the substrate PCB1 via a conductive joint material SB3 electrically separated from the conductive joint materials SB1 and SB2.

權(quán)利要求

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