FIG. 1A is a top view of a nonvolatile memory device array 100, according to an embodiment of the disclosure. Referring to FIG. 1A, the nonvolatile memory device array 100 comprises a first active region 110a and a second active region 110b and an isolation structure 118 surrounding each active region, 110a and 110b. The isolation structure 118 is shown as a dashed outline. In an embodiment, the isolation structure 118 may be shallow trench isolation (STI). A portion of the isolation structure 118 is between the first active region 110a and the second active region 110b. The isolation structure 118 and the active regions 110a and 110b may be formed in a semiconductor substrate 180. The first active region 110a and the second active region 110b may collectively be referred to as active regions 110.
