FIG. 8 illustrates flowchart 800 for forming FE capacitive structure of the FIG. 5, in accordance with some embodiments. Flowchart 800 is similar to flowchart 600. In some embodiments, integrated layer 512 (e.g., Iridium where approximately 2 nm is oxidized in-situ) is deposited over substrate 314 as indicated by block 802. Integrated layer 512 combines bottom electrode 312b, templating layer 314, and bottom diffusion barrier layer 311a in a single integrated layer. Integrated layer 512 can be a super lattice of two or more materials. At block 803, ferroelectric material 320 is formed or deposited over integrated layer 512. Thereafter top electrode 312a and top diffusion barrier 311a are formed or deposited at blocks 606 and 607, respectively.
Deposition of the materials or layers in various embodiments can be realized by Physical Vapor Deposition methods such as D.C. Sputtering, Pulsed D.C. Sputtering, Reactive Sputtering, Radio Frequency (RF) Sputtering, Pulsed Laser Deposition, Ion Beam Deposition, and combinations thereof. Deposition can also be realized by means of Chemical Vapor Deposition methods such as Thermal CVD, Plasma-enhanced CVD, Thermal Atomic Layer Deposition (ALD), Plasma-enhanced Atomic Layer Deposition. It is also possible to deposit different layers with different techniques.
