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Method for transmitting downlink control information, terminal device and network device

專利號
US11665697B2
公開日期
2023-05-30
申請人
GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.(CN Dongguan)
發(fā)明人
Hai Tang; Hua Xu
IPC分類
H04B7/0408; H04B7/0413; H04J11/00; H04L5/00; H04W8/24; H04W72/04; H04W72/08; H04W84/02; H04W88/02; H04W88/08; H04W92/02; H04W92/10; H04W72/044; H04W72/0453; H04W72/0446
技術(shù)領(lǐng)域
resource,control,candidate,terminal,dci,device,sets,channel,in,multiple
地域: Guangdong

摘要

A method for transmitting downlink control information, terminal device and network device are provided. The method includes: a terminal device determines a plurality of candidate resource sets for transmitting first control information; the terminal device detects the first control information sent by a network device in the plurality of candidate resource sets; the terminal device determines a target resource set in the plurality of candidate resource sets according to a detection result of the first control information; the terminal device determines a target control channel resource corresponding to the target resource set according to the target resource set and a first mapping relationship, wherein the first mapping relationship is used for indicating a corresponding relationship between the plurality of candidate resource sets and a plurality of control channel resources; and the terminal device detects second control information sent by the network device in the target control channel resource.

說明書

Optionally, different candidate resource sets in the multiple candidate resource sets occupy different frequency-domain resources and/or different OFDM symbols.

It should be understood that, in an implementation of the present application, the processor 810 may be a central processing unit (CPU), or the processor 810 may be other general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, a discrete gate or a transistor logic device, or a discrete hardware component, etc. The general purpose processor may be a microprocessor, or the processor may be any conventional processor or the like.

The storage 830 may include a read-only memory and a random access memory and provide instructions and data to the processor 810. A portion of storage 830 may also include a non-volatile random access memory. For example, the storage 830 may also store device-type information.

權(quán)利要求

1
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