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Semiconductor device and method for fabricating the same

專利號
US11665978B2
公開日期
2023-05-30
申請人
UNITED MICROELECTRONICS CORP.（TW Hsin-Chu）
發(fā)明人
Jia-Rong Wu; Rai-Min Huang; I-Fan Chang; Ya-Huei Tsai; Yu-Ping Wang
IPC分類
H10N50/80
技術領域
mtj,imd,metal,layer,patterned,mask,in,could,slots,nitride
地域： Hsin-Chu

摘要

A method for fabricating a semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a first patterned mask on the first IMD layer, in which the first patterned mask includes a first slot extending along a first direction; forming a second patterned mask on the first patterned mask, in which the second patterned mask includes a second slot extending along a second direction and the first slot intersects the second slot to form a third slot; and forming a first metal interconnection in the third slot.

說明書

1 2 3 4 5 6 7 8 9 10 11 12 13 14
BACKGROUND OF THE INVENTION 1. Field of the Invention

The invention relates to a semiconductor device and method for fabricating the same, and more particularly to a magnetoresistive random access memory (MRAM) and method for fabricating the same.

2. Description of the Prior Art

Magnetoresistance (MR) effect has been known as a kind of effect caused by altering the resistance of a material through variation of outside magnetic field. The physical definition of such effect is defined as a variation in resistance obtained by dividing a difference in resistance under no magnetic interference by the original resistance. Currently, MR effect has been successfully utilized in production of hard disks thereby having important commercial values. Moreover, the characterization of utilizing GMR materials to generate different resistance under different magnetized states could also be used to fabricate MRAM devices, which typically has the advantage of keeping stored data even when the device is not connected to an electrical source.

權利要求

1
What is claimed is:1. A method for fabricating a semiconductor device, comprising:forming a first inter-metal dielectric (IMD) layer on a substrate;forming a first metal interconnection in the first IMD layer;forming a second IMD layer on the first IMD layer and the first metal interconnection;forming a first patterned mask on the second IMD layer, wherein the first patterned mask comprises a first slot extending along a first direction and overlapping the first metal interconnection;forming a second patterned mask on the first patterned mask, wherein the second patterned mask comprises a second slot extending along a second direction and the first slot intersects the second slot to form a third slot;removing the second IMD layer through the third slot to form a contact hole; andforming a conductive layer in the contact hole to form a second metal interconnection for electrically connecting the first metal interconnection;forming a magnetic tunneling junction (MTJ) stack on the second IMD layer and the second metal interconnection; andpatterning the MTJ stack to form a MTJ on the second metal interconnection, wherein an area of the MTJ is smaller than an area of the second metal interconnection.2. The method of claim 1, wherein the first patterned mask and the second patterned mask comprise different materials.3. The method of claim 1, wherein the first patterned mask comprises a metal mask.4. The method of claim 1, wherein the second patterned mask comprises a patterned resist.5. The method of claim 1, wherein the first slot comprises a rectangular slot.6. The method of claim 1, wherein the second slot comprises a rectangular slot.7. The method of claim 1, wherein the third slot comprises a square slot.8. The method of claim 1, wherein the first direction is orthogonal to the second direction.
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