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Mechanically bridged SMD interconnects for electronic devices

專利號(hào)
US11744020B2
公開日期
2023-08-29
申請(qǐng)人
Texas Instruments Incorporated(US TX Dallas)
發(fā)明人
Kyle Brent Norell; Claude Albert Fernandez; Charles Allen DeVries
IPC分類
H05K3/22; H05K1/18; H05K1/11; H05K3/28; H05K3/34
技術(shù)領(lǐng)域
smd,inductor,bridged,package,die,electronic,substrate,tie,sip,molded
地域: TX TX Dallas

摘要

An electronic device includes a package substrate, at least one integrated circuit (IC) die including a substrate having a semiconductor surface including circuitry electrically coupled to bond pads positioned onto contact pads on a top surface of a package substrate. At least one surface mount device (SMD) component including at least a first terminal and a second terminal is on the package substrate positioned lateral to the IC die. There is at least one SMD interconnect electrically connecting to at least one of the first terminal and the second terminal to the bond pads. The SMD interconnect includes a portion of a tie bar that extends to an outer edge of the electronic device.

說明書

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FIG. 4A shows an example in-process SIP 400 in a power module implementation including an SMD component shown again as being an inductor comprising an inductor body 132, and an inductor terminations 138 that has a first exposed termination 138a shown connected to it on one side of the inductor body 132 and a second exposed termination 138b connected to it on an opposite side of the inductor body 132. The respective exposed terminations 138a, 138b are assembled on SMD interconnects (that can be referred to as being “clips”) shown as 1151 and 115r having an outer edge surface 112a (provided by its tie bar) that extends to an outer edge of the package substrate 420 that the SMD interconnects are mounted on.

On a surface of the package substrate 420 is a semiconductor die 120 shown flipchip mounted and a SMD passive component 436. Alternatively, the semiconductor die 120 can be wire bonded. There are also a plurality of electrically conductive material regions acting as interfaces, such as comprising solder or an electrically conductive epoxy, two for each for the mounting of the exposed terminations 138a, 138b, and one each for the mounting of the respective SMD interconnects 1151, 115r, with all the electrically conductive material shown as 427.

權(quán)利要求

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