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Mechanically bridged SMD interconnects for electronic devices

專利號
US11744020B2
公開日期
2023-08-29
申請人
Texas Instruments Incorporated(US TX Dallas)
發(fā)明人
Kyle Brent Norell; Claude Albert Fernandez; Charles Allen DeVries
IPC分類
H05K3/22; H05K1/18; H05K1/11; H05K3/28; H05K3/34
技術(shù)領(lǐng)域
smd,inductor,bridged,package,die,electronic,substrate,tie,sip,molded
地域: TX TX Dallas

摘要

An electronic device includes a package substrate, at least one integrated circuit (IC) die including a substrate having a semiconductor surface including circuitry electrically coupled to bond pads positioned onto contact pads on a top surface of a package substrate. At least one surface mount device (SMD) component including at least a first terminal and a second terminal is on the package substrate positioned lateral to the IC die. There is at least one SMD interconnect electrically connecting to at least one of the first terminal and the second terminal to the bond pads. The SMD interconnect includes a portion of a tie bar that extends to an outer edge of the electronic device.

說明書

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

FIG. 4B shows a top perspective view of an example SIP reflecting a finished electronic device after singulation. The SIP comprises the direct stack-up of the electronic device unit shown in FIG. 2A including the package substrate including a semiconductor die (not visible in FIG. 4B) shown mounted thereon, a disclosed SMD interconnect, and the SMD component shown again as being an inductor, with one of the inductor terminations shown.

FIG. 5 shows a bottom perspective view of the example SIP shown in FIG. 4B. On a bottom side of the package substrate, there is shown exposed contact pads configured for mounting to a host device, such as a PCB. The outer edge surface of the tie bar of an SMD interconnect is also shown exposed from the outer edge of the mold compound on the package substrate.

FIG. 6 shows a functional block diagram for an example isolated DC-DC converter package comprising a package substrate shown as a leadframe, showing a typical example of a capacitor placement along with a disclosed SMD interconnect shown collectively as 218/100 connected between VIN and PGND which comprises an input bypass capacitor arrangement. The isolated DC-DC converter package comprises a primary side including a first semiconductor die that includes a transformer driver and a secondary side including a second semiconductor die including a rectifier. There is a transformer stack including at least one coil is positioned between the first semiconductor die and the second semiconductor die.

DETAILED DESCRIPTION

權(quán)利要求

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