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Semiconductor memory device and method for manufacturing the same

專利號
US11744075B2
公開日期
2023-08-29
申請人
Kioxia Corporation（JP Minato-ku）
發(fā)明人
Yoshiaki Fukuzumi; Shinya Arai; Masaki Tsuji; Hideaki Aochi; Hiroyasu Tanaka
IPC分類
H10B43/27; H01L29/66; H01L29/792; H10B43/10; H10B43/50; H01L29/423
技術(shù)領(lǐng)域
film,electrode,gate,in,slits,memory,insulating,pillars,interlayer,films
地域： Minato-ku

摘要

A semiconductor memory device includes a connecting member including a semiconductor material, a first electrode film, a first insulating film, a stacked body and three or more semiconductor pillars. The stacked body includes second electrode films and second insulating films that alternately stacked. The semiconductor pillars are arrayed along two or more directions, extend in a stacking direction, pierce through the stacked body and the first insulating film, and are connected to the connecting member. The device includes a third insulating film provided between the semiconductor pillars and the stacked body and between the connecting member and the first electrode film. A charge storage layer is provided at least between one of the second electrode films and the third insulating film.

說明書

As shown in FIG. 25, in a semiconductor memory device 3a according to the variation, the peripheral section 40b of the source interconnection member 40 is silicided and is formed of, for example, titanium silicide (TiSi2). By forming an n+-type polysilicon layer thin compared with the third embodiment, the entire polysilicon layer is consumed for the silicidation. It is possible to realize a structure according to the variation. In this case, the peripheral section 40b penetrates into the mesh-like connecting member 25. A penetrating section 40c is formed.

According to this variation, compared with the third embodiment, it is possible to further reduce a resistance value of the source interconnection member 40. Impurities, for example, phosphorus (P) and arsenic (As) included in the peripheral section 40b are pushed out from the peripheral section 40b according to a so-called “snow shoveling effect”. It is possible to more effectively supply impurities serving as a donor to the mesh-like connecting member 25. Components, manufacturing methods, operations, and effects other than those described above in the variation are the same as those in the third embodiment.

Fourth Embodiment

A fourth embodiment is described.

FIG. 26A is a plan view illustrating the semiconductor memory device according to the first embodiment. FIG. 26B is a plan view illustrating a semiconductor memory device according to the fourth embodiment.

權(quán)利要求

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