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Semiconductor memory device and method for manufacturing the same

專利號(hào)
US11744075B2
公開日期
2023-08-29
申請(qǐng)人
Kioxia Corporation(JP Minato-ku)
發(fā)明人
Yoshiaki Fukuzumi; Shinya Arai; Masaki Tsuji; Hideaki Aochi; Hiroyasu Tanaka
IPC分類
H10B43/27; H01L29/66; H01L29/792; H10B43/10; H10B43/50; H01L29/423
技術(shù)領(lǐng)域
film,electrode,gate,in,slits,memory,insulating,pillars,interlayer,films
地域: Minato-ku

摘要

A semiconductor memory device includes a connecting member including a semiconductor material, a first electrode film, a first insulating film, a stacked body and three or more semiconductor pillars. The stacked body includes second electrode films and second insulating films that alternately stacked. The semiconductor pillars are arrayed along two or more directions, extend in a stacking direction, pierce through the stacked body and the first insulating film, and are connected to the connecting member. The device includes a third insulating film provided between the semiconductor pillars and the stacked body and between the connecting member and the first electrode film. A charge storage layer is provided at least between one of the second electrode films and the third insulating film.

說明書

In the stacked body 67, slits 80 are formed in the X-direction center portions in the blocks. The slits 80 extend along the YZ plane and reach the mesh-like connecting member 25. The source interconnection members 40 are provided on the insides of the slits 80. The p+-type semiconductor portions 55 are formed in regions directly under the slits 80 in the mesh-like connecting member 25. The p+-type semiconductor portions 55 are connected to a driving circuit via the source interconnection members 40. That is, only the n+-type semiconductor portions 56 are provided in regions directly under the source interconnection members 40 that divide the selection gate electrode film 16 for each of the blocks. The p+-type semiconductor portions 55 are provided on the insides of the blocks.

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