A thin film transistor TFT may be formed over the substrate 100. The thin film transistor TFT may include a semiconductor layer A, a gate electrode G, a source electrode S, and a drain electrode D. Although FIG. 3 illustrates a top gate type TFT sequentially including a semiconductor layer A, a gate electrode G, and a source electrode S and a drain electrode D, the inventive concept is not limited thereto and various types of TFTs, such as bottom gate type TFTs, may also be used herein.

The semiconductor layer A may be formed by using an organic semiconductor or an inorganic semiconductor, such as silicon. Also, the semiconductor layer A includes a source region, a drain region, and a channel region therebetween. For example, when the semiconductor layer A is formed by using amorphous silicon, the semiconductor layer A, which includes a source region, a drain region, and a channel region therebetween, may be formed by forming an amorphous silicon layer over the substrate 100, crystallizing the amorphous silicon layer to form a polycrystalline silicon layer, patterning the polycrystalline silicon layer, and then doping a drain region and a source region of an edge thereof.

After the forming of the semiconductor layer A, a gate insulating film 210 may be formed over the semiconductor layer A over the substrate 100. The gate insulating film 210 may include a single layer or multiple layers formed of an inorganic material, such as silicon oxide and/or silicon nitride. The gate insulating film 210 insulates the semiconductor layer A from the gate electrode G.