The source electrode S and the drain electrode D are formed over the interlayer insulating film 230. In an embodiment, the interlayer insulating film 230 and the gate insulating film 210 are formed to expose the source region and the drain region of the semiconductor layer A, and the source electrode S and the drain electrode D are formed to respectively contact the exposed source region and the exposed drain region of the semiconductor layer A. The source electrode S and the drain electrode D may include a single layer or multiple layers formed of at least one of aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and/or copper (Cu).

The thin film transistor TFT is electrically connected to the OLED to apply a signal for driving the OLED to the OLED. The thin film transistor TFT may be covered and protected by a planarization film 250. The planarization film 250 may include an inorganic insulating film and/or an organic insulating film. For example, the inorganic insulating film may include SiO₂, SiN_x, SiON, Al₂O₃, TiO₂, Ta₂O₅, HfO₂, ZrO₂, BST, and/or PZT, and the organic insulating film may include a general-purpose polymer (PMMA, PS), a polymer derivative having a phenol-based group, an acryl-based polymer, an imide-based polymer, an aryl ether-based polymer, an amide-based polymer, a fluorine-based polymer, a p-xylene-based polymer, a vinyl alcohol-based polymer, and/or any blend thereof. Also, the planarization film 250 may be formed of a composite stack of an inorganic insulating film and an organic insulating film.