The data processing system 900 includes one or more bus(es) 909 that serve to interconnect the various components of the system. One or more processor(s) 903 are coupled to the one or more bus(es) 909 as is known in the art. Memory 905 may be volatile DRAM or non-volatile RAM, such as NOR flash memory or other types of high-speed, non-volatile, execute-in-place memory. This memory can be coupled to the one or more bus(es) 909 using techniques known in the art. The data processing system 900 can also include explicitly non-volatile memory 907, such as data storage devices including one or more hard disk drives, flash memory devices or other types of memory systems that maintain data after power is removed from the system. The non-volatile memory 907 and the memory 905 can each couple to the one or more bus(es) 909 using known interfaces and connection techniques. A display controller 922 can couple to the one or more bus(es) 909 to receive display data, which can be displayed on a display device 923. In one embodiment the display device 923 includes an integrated touch input to provide a touch screen.