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Method for manufacturing thermal dispersion layer in programmable metallization cell

專(zhuān)利號(hào)
US11800823B2
公開(kāi)日期
2023-10-24
申請(qǐng)人
Taiwan Semiconductor Manufacturing Co., Ltd.(TW Hsinchu)
發(fā)明人
Fa-Shen Jiang; Hsing-Lien Lin
IPC分類(lèi)
H10N70/20; G11C13/00; H10N70/00
技術(shù)領(lǐng)域
electrode,layer,dielectric,conductive,sidewalls,dispersion,ild,bottom,pmcram,top
地域: Hsin-Chu

摘要

Some embodiments relate to a method for manufacturing a memory device. The method includes forming a bottom electrode over a substrate. A heat dispersion layer is formed over the bottom electrode. A dielectric layer is formed over the heat dispersion layer. A top electrode is formed over the dielectric layer. The heat dispersion layer comprises a first dielectric material.

說(shuō)明書(shū)

FIG. 3C illustrates a series of IV curves of embodiments of a memory device including a programmable metallization cell, such as previously illustrated and described in FIG. 1. These IV curves reflect varying numbers of set and reset operations being carried out on the programmable metallization cell. In the set and reset operations, for example, a voltage is applied across the bottom electrode 106 and the metal layer 112, and the amount of current over the metallization cell varies as a function of the applied voltage, which dictates to what extent a conductive bridge 304 is present. Thus, in the set operation, the applied (e.g., positive) voltage induces formation of the conductive bridge 304 in the dielectric layer 110, whereas in the reset operation, the applied (e.g., negative) voltage removes at least a portion of the conductive bridge 304 from the dielectric layer 110 (or vice versa). Thus, the programmable metallization cells show typical bi-stable I-V curves demonstrating bipolar switching for the cells.

權(quán)利要求

1
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