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Safety mechanisms, wake up and shutdown methods in distributed power installations

專利號(hào)
US11888387B2
公開日期
2024-01-30
申請(qǐng)人
Solaredge Technologies, Ltd(IL Herzeliya)
發(fā)明人
Meir Adest; Guy Sella; Lior Handelsman; Yoav Galin; Amir Fishelov; Meir Gazit; Yaron Binder
IPC分類
H02J1/00; H02M1/32; H02M3/158; G01S3/786; H01L31/02; H02H3/20; H02J1/10; H02J3/46; H02M7/493; H04B3/54; H02J3/38; H02J7/35; H02M1/00
技術(shù)領(lǐng)域
inverter,power,string,voltage,islanding,grid,converter,in,signal,output
地域: Herzliya Pituah

摘要

A distributed power system including multiple DC power sources and multiple power modules. The power modules include inputs coupled respectively to the DC power sources and outputs coupled in series to form a serial string. An inverter is coupled to the serial string. The inverter converts power input from the serial string to output power. A signaling mechanism between the inverter and the power module is adapted for controlling operation of the power modules. Also, for a protection method in the distributed power system, when the inverter stops production of the output power, each of the power modules is shut down and thereby the power input to the inverter is ceased.

說(shuō)明書

Reference is now made to FIG. 9B, showing a simplified block diagram according to an embodiment of the present invention for up conversion of 100/120 Hz. into a higher frequency in order to enable faster detection in receiver 907 of leakage from the grid. The 100 Hertz or 120 Hertz signal is AC coupled by capacitor 931 to remove the direct current component in serial string 923 and lines 410 and 412. The 100/120 Hz. signal is optionally amplified and rectified by a full wave rectifier 935 so that a 100 Hz or 120 Hz unipolar DC ripple is achieved. The 100/120 Hz unipolar signal is split. One portion of the 100/120 Hz. unipolar ripple is converted to a square wave, such as in a comparator/digitize circuit 939. A second portion of the 100/120 Hz unipolar ripple undergoes a known phase shift, e.g. of 400 Hz. in a phase shifter 933 and output to a second comparator/digitizing circuit 931. The two outputs of two digitizing circuits 939,931 undergo an exclusive OR in a XOR circuit 933 which outputs a signal at a much higher frequency, e.g. 800

Hz.

權(quán)利要求

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