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Power management circuit

專利號(hào)
US11888399B2
公開日期
2024-01-30
申請(qǐng)人
ROHM CO., LTD.(JP Kyoto)
發(fā)明人
Kazunori Itou
IPC分類
H02M3/158; H02M1/00; H02M1/08; H02M1/32
技術(shù)領(lǐng)域
transistor,circuit,mode,pin,first,second,blk2,blk1,mh1,feedback
地域: Kyoto

摘要

In a first mode, a first feedback controller generates a first control signal SCTRL1 based on a signal at a first feedback pin, so as to control a first pre-driver. A second feedback controller ¥ generates a second control signal based on a signal at a second feedback pin, so as to control a second pre-driver. In a second mode, the first feedback controller ¥ generates the first control signal based on a signal at the first feedback pin, so as to control the first pre-driver. The second pre-driver drives the second pre-driver based on a third control signal received from a first circuit block.

說明書

In the second mode, the power management circuit 100 forms a single-output (single-channel) DC/DC converter together with external components. Specifically, a common inductor is coupled to the LX1 pin and the LX2 pin. Furthermore, a pair of the first high-side transistor MH1 and the second high-side transistor MH2 are electrically coupled in parallel. Moreover, a pair of the first low-side transistor ML1 and the second low-side transistor ML2 are electrically coupled in parallel.

In the second mode, a feedback signal VFB1 that corresponds to the output signal of the common DC/DC converter is fed back to the FB1 pin. The FB2 pin may be set to a non-connection (NC) state. Also, as described later, the FB2 pin may be employed as a pin for setting the mode.

In the second mode, the first feedback controller 110_1 generates the first control signal SCTRL1 based on the signal input to the FB1 pin. The operation of the second feedback controller 110_2 is stopped. The first feedback controller 110_1 and the second circuit block BLK2 (second pre-driver 120_2) are coupled via a signal path 102. This allows a third control signal SCTRL3 to be supplied to the second pre-driver 120_2 via the signal path 102. For example, the third control signal SCTRL3 may include a replica of a high-side pulse signal configured as an instruction to turn on and off the first high-side transistor MH1 and a replica of a low-side pulse signal configured as an instruction to turn on and off the first low-side transistor ML1.

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