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Power management circuit

專利號
US11888399B2
公開日期
2024-01-30
申請人
ROHM CO., LTD.（JP Kyoto）
發(fā)明人
Kazunori Itou
IPC分類
H02M3/158; H02M1/00; H02M1/08; H02M1/32
技術領域
transistor,circuit,mode,pin,first,second,blk2,blk1,mh1,feedback
地域： Kyoto

摘要

In a first mode, a first feedback controller generates a first control signal SCTRL1 based on a signal at a first feedback pin, so as to control a first pre-driver. A second feedback controller ￥ generates a second control signal based on a signal at a second feedback pin, so as to control a second pre-driver. In a second mode, the first feedback controller ￥ generates the first control signal based on a signal at the first feedback pin, so as to control the first pre-driver. The second pre-driver drives the second pre-driver based on a third control signal received from a first circuit block.

說明書

  • (ii) Second mode
  • The FB1 pin is master, and the FB2 pin is slave.
  • (iii) Third mode
  • The FB1 pin is slave, and the FB2 pin is master.

    • Modification 7

    Description has been made in the embodiment regarding an arrangement in which only the first low-side transistor side is provided with the low-side current detection circuit. However, the present invention is not restricted to such an arrangement. Also, both the first low-side transistor and the second low-side transistor may each be provided with a low-side current detection circuit.

    Description has been made regarding the present disclosure with reference to the embodiments using specific terms. However, the above-described embodiments show only an aspect of the mechanisms and applications of the present invention for exemplary purposes only, and are by no means intended to be interpreted restrictively. Rather, various modifications and various changes in the layout can be made without departing from the spirit and scope of the present invention defined in appended claims.

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