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Power management circuit

專利號
US11888399B2
公開日期
2024-01-30
申請人
ROHM CO., LTD.(JP Kyoto)
發(fā)明人
Kazunori Itou
IPC分類
H02M3/158; H02M1/00; H02M1/08; H02M1/32
技術(shù)領(lǐng)域
transistor,circuit,mode,pin,first,second,blk2,blk1,mh1,feedback
地域: Kyoto

摘要

In a first mode, a first feedback controller generates a first control signal SCTRL1 based on a signal at a first feedback pin, so as to control a first pre-driver. A second feedback controller ¥ generates a second control signal based on a signal at a second feedback pin, so as to control a second pre-driver. In a second mode, the first feedback controller ¥ generates the first control signal based on a signal at the first feedback pin, so as to control the first pre-driver. The second pre-driver drives the second pre-driver based on a third control signal received from a first circuit block.

說明書

Also, the power management circuit may further include: a first input pin; a first output pin; a first ground pin; a second input pin; a second output pin; and a second ground pin. The first circuit block may further include: a first high-side transistor arranged between the first input pin and the first output pin; and a first low-side transistor arranged between the first output pin and the first ground pin. Also, the second circuit block may further include: a second high-side transistor arranged between the second input pin and the second output pin; and a second low-side transistor arranged between the second output pin and the second ground pin.

Also, the power management circuit may further include: a first overcurrent detection circuit structured to compare a current that flows through the first high-side transistor with a first overcurrent threshold value; and a second overcurrent detection circuit structured to compare a current that flows through the second high-side transistor with a second overcurrent threshold value. Also, in the first mode, the first overcurrent detection circuit and the second overcurrent detection circuit may be enabled. Also, in the second mode, the first overcurrent detection circuit may be enabled, and the second overcurrent detection circuit may be disabled. With such an arrangement in which, in the second mode, only the first overcurrent detection circuit is enabled, this allows power consumption to be reduced.

In the second mode, both the first overcurrent detection circuit and the second overcurrent detection circuit may operate. In this case, a protection operation may be executed based on an output of the overcurrent detection circuit that has detected an overcurrent in an earlier stage.

權(quán)利要求

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