FIG. 3B is a circuit diagram applicable to the block diagram of the multiplier circuit 30 shown in FIG. 3A. The multiplier circuit 30 includes a Gilbert circuit 46, which includes a transistor 41_1, a transistor 41_2, a transistor 41_3, a transistor 41_4, a transistor 41_5, a transistor 41_6, a transistor 41_7, a transistor 418, a transistor 42_1, a transistor 42_2, a resistor 43_1, and a resistor 43_2, and the analog potential holding circuits 45N and 45P, which include a transistor 44_1 and a transistor 44_2 connected to gates of the transistors included in the Gilbert circuit. The signals and voltages illustrated in FIG. 3A are supplied to the gates of the transistors shown in FIG. 3B.
In FIG. 3B, the transistor 41_1, the transistor 41_2, the transistor 41_3, the transistor 41_4, the transistor 41_5, the transistor 41_6, the transistor 41_7, and the transistor 41_8 are transistors including silicon in channel formation regions (Si transistors), specifically p-channel Si transistors. The transistor 42_1 and the transistor 42_2 are n-channel Si transistors. Si transistors can be fabricated by a CMOS technology.
