The transistor 44_1 and the transistor 442 are preferably formed with transistors including oxide semiconductors in channel formation regions (hereinafter referred to as OS transistors). In the structure of one embodiment of the present invention, the OS transistors are used as the transistors included in the analog potential holding circuits 45N and 45P; in that case, an extremely low leakage current flowing between a source and a drain in an off state (hereinafter referred to as an off-state current) can be utilized to hold the analog potential of the signal WW in the analog potential holding circuits 45N and 45P in accordance with the control of the signal CTR.
It is possible to reduce the frequency of updating the analog potential of the signal WW and achieve an intermittent operation of the signal generation unit 32, which outputs the signal WW. The power source control switch 33 has a function of stopping supply of a power source voltage to the control circuit 35 in the signal generation unit 32 in a period during which the analog potential held in the analog potential holding circuit is not updated. The stop of the supply of the power source voltage to the signal generation unit 32 by the power source control switch 33 can achieve lower power consumption of the mixer circuit 19.