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Semiconductor device

專利號
US11888446B2
公開日期
2024-01-30
申請人
SEMICONDUCTOR ENERGY LABORATORY CO., LTD.（JP Atsugi）
發(fā)明人
Kiyotaka Kimura; Takeya Hirose; Hidetomo Kobayashi; Takayuki Ikeda
IPC分類
H03D7/14; H03D7/12; H01L27/12; H01L29/786; H10B12/00
技術領域
insulator,conductor,transistor,oxide,circuit,in,analog,530b,or,530c
地域： Atsugi

摘要

A semiconductor device with a novel structure is provided. The semiconductor device includes a mixer circuit including a digital-analog converter circuit, a control circuit for controlling the digital-analog converter circuit, a power source control switch, and a plurality of Gilbert circuits. The plurality of Gilbert circuits each include an analog potential holding circuit for holding an analog potential output from the digital-analog converter circuit. The control circuit has a function of outputting a signal for controlling the analog potential holding circuit and the digital-analog converter circuit. The power source control switch has a function of stopping supply of a power source voltage to the control circuit in a period during which the analog potential held in the analog potential holding circuit is not updated. The analog potential holding circuit includes a first transistor. The first transistor includes a semiconductor layer including an oxide semiconductor in a channel formation region.

說明書

In addition, an OS transistor can be a four-terminal semiconductor element when having a back gate electrode in addition to a gate electrode, a source electrode, and a drain electrode. The OS transistor can be formed with an electric circuit network that can independently control input and output of signals flowing between a source and a drain depending on a voltage supplied to the gate electrode or the back gate electrode. Therefore, the circuit design can be made on the same concept as that for LSI. Furthermore, electrical characteristics of the OS transistor are better than those of a Si transistor in a high-temperature environment. Specifically, the ratio between an on-state current and an off-state current is large even at a high temperature higher than or equal to 125° C. and lower than or equal to 150° C.; thus, favorable switching operation can be performed.

FIG. 4A and FIG. 4B show a block diagram and a circuit diagram illustrating operation of an analog potential holding circuit 45 applicable to the analog potential holding circuits 45N and 45P illustrated in FIG. 3A and FIG. 3B. Note that the analog potential holding circuits 45N and 45P are circuits for holding analog potentials supplied as differential signals, and have the same circuit configuration. Thus, the analog potential holding circuits 45N and 45P are sometimes referred to as the analog potential holding circuit 45 when the circuit configuration thereof is described.

權(quán)利要求

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