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Semiconductor device

專利號(hào)
US11888446B2
公開(kāi)日期
2024-01-30
申請(qǐng)人
SEMICONDUCTOR ENERGY LABORATORY CO., LTD.（JP Atsugi）
發(fā)明人
Kiyotaka Kimura; Takeya Hirose; Hidetomo Kobayashi; Takayuki Ikeda
IPC分類
H03D7/14; H03D7/12; H01L27/12; H01L29/786; H10B12/00
技術(shù)領(lǐng)域
insulator,conductor,transistor,oxide,circuit,in,analog,530b,or,530c
地域： Atsugi

摘要

A semiconductor device with a novel structure is provided. The semiconductor device includes a mixer circuit including a digital-analog converter circuit, a control circuit for controlling the digital-analog converter circuit, a power source control switch, and a plurality of Gilbert circuits. The plurality of Gilbert circuits each include an analog potential holding circuit for holding an analog potential output from the digital-analog converter circuit. The control circuit has a function of outputting a signal for controlling the analog potential holding circuit and the digital-analog converter circuit. The power source control switch has a function of stopping supply of a power source voltage to the control circuit in a period during which the analog potential held in the analog potential holding circuit is not updated. The analog potential holding circuit includes a first transistor. The first transistor includes a semiconductor layer including an oxide semiconductor in a channel formation region.

說(shuō)明書

The analog potential holding circuit 45 includes a transistor 44, which is an OS transistor. The signal WW is supplied from one of a source and a drain of the transistor 44. A potential based on the signal WW is held in a node FN at which the other of the source and the drain of the transistor 44 is connected to a gate of a transistor 41. The transistor 41 corresponds to a Si transistor included in the Gilbert circuit 46. The node FN preferably includes a capacitor 47 for holding electrical charges. The signal CTR for controlling the on or off of the transistor 44 is supplied to a gate of the transistor 44. The back gate voltage VBG for controlling the threshold voltage of the transistor 44 is applied to a back gate of the transistor 44.

FIG. 5 is a circuit diagram illustrating a configuration example of the adder circuit 31 illustrated above in FIG. 2. FIG. 5 shows signals IOUT_0 to IOUT_3 as the signal IOUT input to the adder circuit 31, an operational amplifier 61, a resistor 62, and a signal VOUT output from the adder circuit 31. VCOM is a reference potential. For example, the signal VOUT that has a voltage value based on the sum of currents can be obtained with the configuration of the adder circuit shown in FIG. 5.

權(quán)利要求

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