Apparatus, memory device and method for storing parameter codes for asymmetric on-die-termination
地域：
Suwon-si
摘要
An apparatus, a memory device, and a method for storing parameter codes with respect to asymmetric on-die-termination (ODT) are provided. The apparatus is connected to an external device via a signal line, and includes: an on-die termination (ODT) circuit set in a first ODT state; a plurality of signal pins, each of which is connected to the signal line; and an ODT control circuit configured to: identify whether a second ODT state of the external device corresponds to the first ODT state, and based on the apparatus being an asymmetric ODT in which the first ODT state and the second ODT state are different, provide an asymmetric ODT parameter code to the external device, and disable the ODT circuit when a signal is not transmitted through the signal line.
說(shuō)明書(shū)
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This application is based on and claims priority to Korean Patent Application No. 10-2021-0042234, filed on Mar. 31, 2021, in the Korean Intellectual Property Office, and Korean Patent Application No. 10-2021-0076234, filed on Jun. 11, 2021, in the Korean Intellectual Property Office, the disclosures of which are incorporated by reference herein in their entireties.
Methods, apparatuses and systems consistent with example embodiments relate storing parameter codes with respect to asymmetric on-die-termination (ODT).
A semiconductor device may include an input/output (I/O) interface that operates at a high speed, for example, a serial interface that includes a transmitter and a receiver. The serial interface may sequentially transmit a plurality of bits, one by one, through one line. In order to prevent distortion of a transmitted signal and provide signal integrity, an ODT circuit may be included in the I/O interface. When a signal is transmitted from the transmitter to the receiver, the ODT circuit of the receiver may provide a termination resistance on the signal line.
權(quán)利要求
What is claimed is:1. An apparatus connected to an external device via a signal line, the apparatus comprising:an on-die termination (ODT) circuit set in a first ODT state; a plurality of signal pins, each of which is connected to the signal line; and an ODT control circuit configured to:obtain information from the external device indicating a second ODT state of the external device, identify whether the second ODT state indicated by the information obtained from the external device corresponds to the first ODT state to determine whether a termination state of the apparatus is a symmetric ODT or an asymmetric ODT, and based on the termination state of the apparatus being the asymmetric ODT in which the first ODT state and the second ODT state are different, provide an asymmetric ODT parameter code to the external device, and disable the ODT circuit when a signal is not transmitted through the signal line. 2. The apparatus of claim 1 , wherein the first ODT state is set based on a first termination resistance provided through the signal line in relation to a supply voltage, and the second ODT state is set based on a second termination resistance provided through the signal line in relation to a ground voltage. 3. The apparatus of claim 1 , wherein the first ODT state is set based on a first termination resistance provided through the signal line in relation to a ground voltage, and the second ODT state is set based on a second termination resistance provided through the signal line in relation to a power voltage. 4. The apparatus of claim 1 , further comprising:a transmitter configured to transmit the signal through the signal line based on a pull-up drive code and a pull-down drive code, wherein the transmitter comprises:a pull-up circuit comprising first transistors connected in parallel between a power voltage and the signal line and configured to respond to the pull-up drive code; and a pull-down circuit comprising second transistors connected in parallel between the signal line and a ground voltage and configured to respond to the pull-down drive code. 5. The apparatus of claim 4 , wherein the ODT control circuit is configured to disable the ODT circuit when the transmitter transmits the signal through the signal line. 6. The apparatus of claim 4 , wherein the ODT control circuit is configured to generate ODT control signals configured to control the ODT circuit,each of the first transistors of the pull-up circuit is configured to turn on or off according to the ODT control signals to vary a first termination resistance according to an on or off state of each of the first transistors, and when the ODT circuit is disabled, all of the first transistors are turned off. 7. The apparatus of claim 4 , wherein the ODT control circuit is configured to generate ODT control signals configured to control the ODT circuit,each of the second transistors of the pull-down circuit is configured to turn on or off according to the ODT control signals to vary a first termination resistance according to an on or off state of each of the second transistors, and based on the ODT circuit being disabled, all of the second transistors are turned off. 8. The apparatus of claim 4 , wherein each of the first transistors is a first transistor type. 9. The apparatus of claim 1 , wherein the plurality of signal pins are related to a clock signal, a command signal, an address signal, and a data signal. 10. The apparatus of claim 9 , further comprising:a receiver configured to receive the data signal through the signal line connected to a signal pin related to the data signal among the plurality of signal pins. 11. The apparatus of claim 10 , wherein the apparatus is configured to enable the ODT circuit when the receiver receives the signal through the signal line. 12. An apparatus comprising:a plurality of signal pins, wherein the apparatus is connected to an external device through a signal line connected to a signal pin among the plurality of signal pins; an on-die termination (ODT) circuit connected to the signal line, the ODT circuit being set to a first ODT state; a mode register configured to store a first parameter code corresponding to a first operating condition of the ODT circuit and a second parameter code corresponding to a second operating condition of the ODT circuit; and a control circuit configured to:provide information indicating the first ODT state to the external device, and based on a determination made by the external device using the information indicating the first ODT state, set the ODT circuit to the first operating condition using the first parameter code in a symmetric ODT where a second ODT state of the external device corresponds to the first ODT state, and set the ODT circuit to the second operating condition using the second parameter code in an asymmetric ODT where the second ODT state of the external device is different from the first ODT state. 13. The apparatus of claim 12 , wherein the control circuit is configured to disable the ODT circuit when a signal is not received through the signal line according to the second operating condition of the ODT circuit. 14. The apparatus of claim 12 , wherein the first parameter code is a default parameter code, andthe second parameter code is provided by the external device. 15. The apparatus of claim 12 , wherein the first ODT state is set based on a first termination resistance provided through the signal line in relation to a supply voltage, and the second ODT state is set based on a second termination resistance provided through the signal line in relation to a ground voltage. 16. The apparatus of claim 12 , wherein the first ODT state is set based on a first termination resistance provided through the signal line in relation to a ground voltage, and the second ODT state is set based on a second termination resistance provided through the signal line in relation to a power voltage. 17. The apparatus of claim 12 , further comprising:a receiver connected to a signal pin, from the external device among the plurality of signal pins, related to a clock signal, a command signal, an address signal, or a data signal transmitted. 18. The apparatus of claim 17 , wherein the control circuit is configured to enable the ODT circuit when the receiver receives a signal through the signal pin. 19. The apparatus of claim 17 , further comprising:a transmitter configured to transmit the data signal through the signal line connected to the signal pin related to the data signal among the plurality of signal pins, wherein the transmitter comprises:a pull-up circuit comprising first transistors connected in parallel between a power voltage and the signal line and configured to respond to a pull-up drive code; and a pull-down circuit comprising second transistors connected in parallel between the signal line and a ground voltage and configured to respond to a pull-down drive code. 20. The apparatus of claim 19 , wherein the control circuit is configured to disable the ODT circuit when the transmitter transmits the data signal through the signal line.
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