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Apparatus, memory device and method for storing parameter codes for asymmetric on-die-termination

專利號
US11888476B2
公開日期
2024-01-30
申請人
SAMSUNG ELECTRONICS CO., LTD.（KR Suwon-si）
發(fā)明人
Daehyun Kwon; Hyejung Kwon; Hyeran Kim; Chisung Oh
IPC分類
H03K19/017; H03K19/00; H03K19/17736; H03K19/17772
技術領域
odt,pull,circuit,signal,device,may,dq,second,line,data
地域： Suwon-si

摘要

An apparatus, a memory device, and a method for storing parameter codes with respect to asymmetric on-die-termination (ODT) are provided. The apparatus is connected to an external device via a signal line, and includes: an on-die termination (ODT) circuit set in a first ODT state; a plurality of signal pins, each of which is connected to the signal line; and an ODT control circuit configured to: identify whether a second ODT state of the external device corresponds to the first ODT state, and based on the apparatus being an asymmetric ODT in which the first ODT state and the second ODT state are different, provide an asymmetric ODT parameter code to the external device, and disable the ODT circuit when a signal is not transmitted through the signal line.

說明書

During the initialization operation (S400), the first device 110 may request termination information of the signal line 130 and/or a data line 830 (FIG. 8) from the second device 120 (S410). For example, ODT circuits 124a and 124c (FIG. 8) of the second device 120 connected to the signal line 130 and/or the data line 830 may be configured as a pull-down circuit connected to the ground voltage VSSQ line. The second device 120 may provide pull-down termination information of the signal line 130 and/or the data line 830 to the first device 110.

The first device 110 may receive pull-down termination information of the signal line 130 and/or the data line 830 from the second device 120 (S420). For example, the ODT circuit 114a of the first device 110 connected to the signal line 130 and/or the data line 830 may be configured as a pull-up circuit connected to the power voltage VDDQ. The first device 110 may confirm that its ODT circuit 114a and the ODT circuit 124a of the second device 120 are in an asymmetric ODT state in which the ODT circuit 114a and the ODT circuit 124a are connected to different voltages.

權利要求

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