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Non-linear polar material based low power multiplier with NOR and NAND gate based reset mechanism

專利號(hào)
US11888479B1
公開日期
2024-01-30
申請(qǐng)人
Kepler Computing Inc.(US CA San Francisco)
發(fā)明人
Amrita Mathuriya; Rafael Rios; Ikenna Odinaka; Rajeev Kumar Dokania; Sasikanth Manipatruni
IPC分類
H03K19/23; H03K19/0185; G06F7/487; H03K19/017; G06F7/501; H03K19/17736
技術(shù)領(lǐng)域
reset,gate,majority,pull,capacitors,adder,minority,multiplier,gates,node
地域: CA CA San Francisco

摘要

A multiplier cell is derived from a 1-bit full adder and an AND gate. The 1-bit full adder is derived from majority and/or minority gates. The majority and/or minority gates include non-linear polar material (e.g., ferroelectric or paraelectric material). A reset mechanism is provided to reset the nodes across the non-linear polar material. The multiplier cell is a hybrid of majority and/or minority gates and complementary metal oxide semiconductor (CMOS) based inverters and/or buffers. The adder uses a non-linear polar capacitor to retain charge with fewer transistors than traditional CMOS sequential circuits. The non-linear polar capacitor includes ferroelectric material, paraelectric material, or non-linear dielectric. Input signals are received by respective terminals of capacitors having non-linear polar material. The other terminals of these capacitors are coupled to a node where the majority function takes place for the inputs.

說明書

In some embodiments, the non-linear input capacitors C1n1, C2n1, and C3n1 comprise non-linear polar material. In some embodiments, the non-linear polar material includes one of: ferroelectric (FE) material, paraelectric material, relaxor ferroelectric, or non-linear dielectric. In various embodiments, para-electric material is the same as FE material but with chemical doping of the active ferroelectric ion by an ion with no polar distortion. In some cases, the non-polar ions are non-s orbital ions formed with p, d, f external orbitals. In some embodiments, non-linear dielectric materials are same as para-electric materials, relaxors, and dipolar glasses.

The majority function is performed at the summing node Vs, and the resulting voltage is projected on to capacitance of driver circuitry 201. Table 3 illustrates the majority function f(Majority a, b, c).

TABLE 1 a b c Vs (f(Majority a, b, c)) 0 0 0 0

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