The first fine tuning circuit 1320a may include the first terminal T1 connected with the 0-th node NO, the second terminal T2 receiving a first control signal CSa, and the third terminal T3. The second fine tuning circuit 1320b may include a fourth terminal T4 connected with the third terminal T3, a fifth terminal T5 receiving a second control signal CSb, and a sixth terminal T6. Thus, in the illustrated embodiment, the phase correction circuit 1300b may include the two fine tuning circuits 1320a and 1320b. In this case, the sixth terminal T6 may be connected with the load capacitor CL.
The first and second fine tuning circuits 1320a and 1320b may tune a phase of a signal, which is output from the delay circuit 1310 to the 0-th node NO, in response to the first and second control signals CSa and CSb. For example, when the first control signal CSa is activated, the first fine tuning circuit 1320a may delay the phase of the signal output from the delay circuit 1310 to the 0-th node NO as much as a first phase. And, when the second control signal CSb is activated, the second fine tuning circuit 1320b may advance the phase of the signal output from the delay circuit 1310 to the 0-th node NO as much as a second phase. In this case, a magnitude of the second phase may be smaller than a magnitude of the first phase. An operation of the first and second fine tuning circuits 1320a and 1320b that operate in response to the first and second control signals CSa and CSb will be described in detail with reference to