The width of the bitline is a width of a projection of the bitline along a direction perpendicular to the substrate. In this embodiment, the bottom of the metal conductive layer 400 located in the bitline contact hole 200 has a width of d1, the metal conductive layer 400 located outside of the bitline contact hole 200 has a width of d2, wherein d1>d2. In the case where the width of d1 has a greater value, a width of the non-metal conductive layer 300 located below is increased therewith; thus, an overall width of the bitline located in the bitline contact hole 200 is increased (including the metal conductive layer and the non-metal conductive layer), and the contact area between the non-metal conductive layer and the active region is increased and thus, the contact resistance between them is decreased. Besides, by thinning the metal conductive layer 400 located outside of the bitline contact hole 200, the width of the non-metal conductive layer 300 located below is reduced, the contact area between the node contact window and the active region is increased, and the contact resistance between the contact window and the active region is decreased.

In one of the embodiments, the method of manufacturing the semiconductor structure further includes:

a dielectric layer 600, with which the surface of the substrate 100 is covered, is formed prior to forming the bitline contact hole 200 and the non-metal conductive layer 300.