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Method of manufacturing a memory device comprising introducing a dopant into silicon oxide

專利號
US11991939B2
公開日期
2024-05-21
申請人
Kioxia Corporation（JP Tokyo）
發(fā)明人
Yoshinori Kumura
IPC分類
H10N70/00; H10B61/00; H01L29/36
技術領域
variable,resistance,dopant,material,electrode,in,memory,ibe,32b,conductor
地域： Tokyo

摘要

According to one embodiment, a method of manufacturing a memory device including a silicon oxide and a variable resistance element electrically coupled to the silicon oxide, includes: introducing a dopant into the silicon oxide from a first surface of the silicon oxide by ion implantation; and etching the first surface of the silicon oxide with an ion beam.

說明書

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a Divisional application of U.S. application Ser. No. 17/016,155, filed on Sep. 9, 2020, which is based upon and claims the benefit of priority from Japanese Patent Application No. 2020-40607, filed Mar. 10, 2020, the entire contents of all of which are incorporated herein by reference.

FIELD

Embodiments described herein relate generally to memory devices.

BACKGROUND

A memory device that uses a magnetoresistance effect element is known in the art.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows functional blocks of a memory device of the first embodiment.

FIG. 2 is a circuit diagram of a memory cell array of the first embodiment.

FIG. 3 shows a cross-sectional structure of part of the memory cell array of the first embodiment.

FIG. 4 shows a cross section of an example of a structure of a memory cell of the first embodiment.

FIG. 5 shows an example of the dopant concentration distribution in a variable resistance material of the first embodiment.

FIGS. 6 to 10 sequentially show how structures of part of the memory device of the first embodiment are during a manufacturing process.

權利要求

1
What is claimed is:1. A method of manufacturing a memory device including a silicon oxide and a variable resistance element electrically coupled to the silicon oxide, comprising:introducing a dopant into the silicon oxide from a first surface of the silicon oxide by ion implantation;thinning the silicon oxide by etching the first surface of the silicon oxide with an ion beam; andremoving a first part of the thinned silicon oxide to leave a second part of the thinned silicon oxide, after the thinning of the silicon oxide.2. The method of claim 1, further comprising:forming a metal on the first surface of the silicon oxide after the introducing the dopant into the silicon oxide;wherein the thinning of the silicon oxide comprises etching the metal with an ion beam before the etching of the first surface of the silicon oxide.3. The method of claim 2, wherein the thinning of the silicon oxide includes forming a conductor on part of the silicon oxide.4. The method of claim 1, further comprising:forming a conductor or an insulator on the first surface of the silicon oxide before the thinning of the first surface of the silicon oxide,wherein the thinning of the first surface of the silicon oxide includes removing the conductor or the insulator, andthe ion beam has an angle of 10° or more and 30° or less with respect to a plane in which the conductor or the insulator spreads.5. The method of claim 1, wherein the dopant includes arsenic, germanium, or antimony.6. The method of claim 1, wherein the variable resistance element has one of two resistances that differ from each other in a steady state.7. The method of claim 1, wherein the variable resistance element includes a first ferromagnetic layer, a second ferromagnetic layer, and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer.
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