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Method of manufacturing a memory device comprising introducing a dopant into silicon oxide

專利號(hào)
US11991939B2
公開日期
2024-05-21
申請人
Kioxia Corporation（JP Tokyo）
發(fā)明人
Yoshinori Kumura
IPC分類
H10N70/00; H10B61/00; H01L29/36
技術(shù)領(lǐng)域
variable,resistance,dopant,material,electrode,in,memory,ibe,32b,conductor
地域： Tokyo

摘要

According to one embodiment, a method of manufacturing a memory device including a silicon oxide and a variable resistance element electrically coupled to the silicon oxide, includes: introducing a dopant into the silicon oxide from a first surface of the silicon oxide by ion implantation; and etching the first surface of the silicon oxide with an ion beam.

說明書

Thereafter, as described with reference to FIG. 9, an upper electrode 33A, a ferromagnet 41A, an insulator 42A, a ferromagnet 43A and a hard mask 44A are formed in this order on the top surface of the conductor 34A. Next, the ferromagnet 43A, insulator 42A, ferromagnet 41A, upper electrode 33A, conductor 34A, variable resistance material 32C and lower electrode 31A are partially removed by IBE, using the hard mask 44A as a mask. As a result, as shown in FIG. 12, ferromagnet 43, insulator 42, ferromagnet 41, upper electrode 33, conductor 34, variable resistance material 32 and lower electrode 31 are formed.

<2.4. Advantages>

權(quán)利要求

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