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Electrochemical energy storage devices

專利號
US11996517B2
公開日期
2024-05-28
申請人
Space Charge, LLC(US CO Aspen)
發(fā)明人
John B. Read; Daniel C. Sweeney
IPC分類
H01M10/0562; H01G11/02; H01G11/04; H01G11/20; H01G11/28; H01G11/46; H01G11/48; H01G11/70; H01M4/04; H01M4/131; H01M4/48; H01M4/525; H01M4/86; H01M10/0585; H01M8/12
技術(shù)領(lǐng)域
nm,electrode,energy,about,solid,may,storage,in,or,be
地域: CO CO Aspen

摘要

Integrated devices comprising integrated circuits and energy storage devices are described. Disclosed energy storage devices correspond to an all-solid-state construction, and do not include any gels, liquids, or other materials that are incompatible with microfabrication techniques. Disclosed energy storage device comprises energy storage cells with electrodes comprising metal-containing compositions, like metal oxides, metal nitrides, or metal hydrides, and a solid state electrolyte.

說明書

In embodiments, a solid-state electrolyte layer, which may be a consolidated structural layer, offers many performance advantages. For example, the structural integrity conferred by a solid electrolyte combined with solid electrodes may eliminate the need for an external case, in some embodiments. For example, in one embodiment, the energy storage device can be naked, i.e., not associated with any other structural materials. In some embodiments, the energy storage device may be built up as an integral circuit element within a larger microcircuit with wafer fabrication techniques. These examples may not possible with conventional battery technologies. The solid-state energy storage devices described herein also may possess inherent physical robustness and a high immunity to shock, vibration, and temperature extremes. In addition, the solid-state energy storage devices described herein are highly scalable such that they may be closely coupled to such entities as MEMS devices and microfluidic systems.

In exemplary embodiments, a solid-state energy storage device becomes, in essence, another circuit element in an integrated circuit and facilitates the realization of optimal circuit paths and grounding schemes because it lends itself to strategic placement within the overall circuit. In some embodiments, this can eliminate as much as 70% of the circuitry (e.g., the portion served by power pins) in existing VLSI/ULSI chips, greatly reducing size and heat generation.

L. Point of Load Power and Inductive Charging

權(quán)利要求

1
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