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Adaptive timing for high frequency inverters

專利號
US11996767B1
公開日期
2024-05-28
申請人
Apple Inc.(US CA Cupertino)
發(fā)明人
Weihong Qiu; Jun Liu; Jizhen Fu; Zaki Moussaoui
IPC分類
H02M1/08; H02J50/10; H02M1/38; H02M7/5387; H02M7/5395
技術領域
dead,switching,inverter,voltage,vsw,comparator,time,gate1,gate2,switch
地域: CA CA Cupertino

摘要

A method of adaptively controlling dead time between turn off of a first switching device of an inverter and turn on of a second switching device of the inverter that is a counterpart of the first switching device can include: monitoring a plurality of switching events of at least one of the first and second switching devices, storing for each monitored switching event an indication whether a dead time associated therewith permitted optimal switching, and adaptively controlling the dead time responsive to the stored indications. Monitoring a plurality of switching events of at least one of the first and second switching devices can further include sampling an output voltage of the inverter and comparing the sampled output voltage to one of a high reference voltage corresponding to a high inverter rail voltage and a low reference voltage corresponding to a low inverter rail voltage.

說明書

The output of comparator 503 can be coupled via switch S3 to the remainder of the control circuitry. Switch S3 may be operated as described below to deliver a signal SW_ZVS indicating whether an immediately preceding switching transition was a zero-voltage switching (ZVS) event and/or did not result in an unnecessarily long period of body diode conduction. In the illustrated example circuit, for the high side switch, a voltage sample Vsh greater than 0.95 Vin will result in a positive comparator output signal SW_ZVS, thus indicating an overshoot corresponding to a too short dead time and unnecessarily long body diode conduction. Conversely, a voltage sample Vsh less than 0.95 Vin will result in a comparator output signal SW_ZVS of zero, thus indicating no overshoot and a dead time that is not too short, without unnecessarily long body diode conduction. For the low side switch, a voltage sample Vsh greater than 0.05 Vin will result in a positive comparator output signal SW_ZVS, thus indicating a too early transition and too short dead time, and thus non-ZVS switching. Conversely, a voltage sample Vsh less than 0.05 Vin will result in a comparator output signal SW_ZVS of zero, thus indicating an appropriate transition and a dead time that is not too short, achieving ZVS switching. In any of the foregoing cases, a sequence or series of comparator output values may be stored or by the inverter controller, so that multiple preceding switching events may be evaluated to determine whether the dead time should be adjusted.

權利要求

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