As shown, circuitry 400 can include processor unit 450, memory 420, input/output (I/O) interface 430 coupled via an interconnect 460 (e.g., a system bus). I/O interface 430 can be coupled to one or more I/O devices 440.

In various embodiments, processor unit 450 can include one or more processors. In some embodiments, processor unit 450 can include one or more coprocessor units. In some embodiments, multiple instances of processor unit 450 can be coupled to interconnect 460. Processor unit 450 (or each processor within 450) can contain a cache or other form of on-board memory. In general circuitry 400 is not limited to any particular type of processor unit or processor subsystem.

Memory 420 can be usable by processor unit 450 (e.g., to store instructions executable by and data used by unit 450). Memory 420 may be implemented by any suitable type of physical memory media, including hard disk storage, floppy disk storage, removable disk storage, flash memory, random access memory (RAM-SRAM, EDO RAM, SDRAM, DDR SDRAM, Rambus? RAM, etc.), ROM (PROM, EEPROM, etc.), and so on. Memory 420 may consist solely of volatile memory in one embodiment.