FIG. 7 illustrates a computer system 400 suitable for implementing one or more embodiments disclosed herein. The computer system 400 includes a processor 402 (which may be referred to as a central processor unit or CPU) that is in communication with memory devices including secondary storage 404, read only memory (ROM) 406, random access memory (RAM) 408, input/output (I/O) devices 410, and network connectivity devices 412. The processor 402 may be implemented as one or more CPU chips.